Commit c4055a8c authored Oct 17, 2016 by Robert Jarzmik Committed by David S. Miller Oct 18, 2016

net: smsc91x: add u16 workaround for pxa platforms



Add a workaround for mainstone, idp and stargate2 boards, for u16 writes
which must be aligned on 32 bits addresses.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent 9c365f31

Documentation/devicetree/bindings/net/smsc-lan91c111.txt

+2 −0

Original line number	Diff line number	Diff line
		@@ -13,3 +13,5 @@ Optional properties:
		16-bit access only.
		- power-gpios: GPIO to control the PWRDWN pin
		- reset-gpios: GPIO to control the RESET pin
		- pxa-u16-align4 : Boolean, put in place the workaround the force all
		u16 writes to be 32 bits aligned