arm64/sve: System register and exception syndrome definitions

The SVE architecture adds some system registers, ID register fields
and a dedicated ESR exception class.

This patch adds the appropriate definitions that will be needed by
the kernel.

Change-Id: I717a862853dd2f756552179490225517eb19dbd5
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 672365649ccac68cf6fafecad1a7913951e7493b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git


[groverm@codeaurora: Resolve trivial merge conflicts]
Signed-off-by: Mayank Grover <groverm@codeaurora.org>