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Commit c2da9133 authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge tag 'iwlwifi-next-for-kalle-2016-08-30-2' of...

Merge tag 'iwlwifi-next-for-kalle-2016-08-30-2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next

* Preparation for new HW continues;
* Some DQA improvements;
* Support for GMAC;
parents 60747ef4 76f8c0e1
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+52 −31
Original line number Diff line number Diff line
@@ -72,15 +72,15 @@
#define IWL9000_SMEM_OFFSET		0x400000
#define IWL9000_SMEM_LEN		0x68000

#define  IWL9000_FW_PRE "iwlwifi-9000-pu-a0-lc-a0-"
#define  IWL9000_FW_PRE "iwlwifi-9000-pu-a0-jf-a0-"
#define  IWL9260_FW_PRE "iwlwifi-9260-th-a0-jf-a0-"
#define  IWL9260LC_FW_PRE "iwlwifi-9260-th-a0-lc-a0-"
#define  IWL9000LC_FW_PRE "iwlwifi-9000-pu-a0-lc-a0-"
#define IWL9000_MODULE_FIRMWARE(api) \
	IWL9000_FW_PRE "-" __stringify(api) ".ucode"
#define IWL9260_MODULE_FIRMWARE(api) \
	IWL9260_FW_PRE "-" __stringify(api) ".ucode"
#define IWL9260LC_MODULE_FIRMWARE(api) \
	IWL9260LC_FW_PRE "-" __stringify(api) ".ucode"
#define IWL9000LC_MODULE_FIRMWARE(api) \
	IWL9000LC_FW_PRE "-" __stringify(api) ".ucode"

#define NVM_HW_SECTION_NUM_FAMILY_9000		10

@@ -146,6 +146,16 @@ static const struct iwl_tt_params iwl9000_tt_params = {
	.mac_addr_from_csr = true,					\
	.rf_id = true

const struct iwl_cfg iwl9160_2ac_cfg = {
	.name = "Intel(R) Dual Band Wireless AC 9160",
	.fw_name_pre = IWL9260_FW_PRE,
	IWL_DEVICE_9000,
	.ht_params = &iwl9000_ht_params,
	.nvm_ver = IWL9000_NVM_VERSION,
	.nvm_calib_ver = IWL9000_TX_POWER_VERSION,
	.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
};

const struct iwl_cfg iwl9260_2ac_cfg = {
	.name = "Intel(R) Dual Band Wireless AC 9260",
	.fw_name_pre = IWL9260_FW_PRE,
@@ -156,13 +166,9 @@ const struct iwl_cfg iwl9260_2ac_cfg = {
	.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
};

/*
 * TODO the struct below is for internal testing only this should be
 * removed by EO 2016~
 */
const struct iwl_cfg iwl9260lc_2ac_cfg = {
		.name = "Intel(R) Dual Band Wireless AC 9260",
		.fw_name_pre = IWL9260LC_FW_PRE,
const struct iwl_cfg iwl9270_2ac_cfg = {
	.name = "Intel(R) Dual Band Wireless AC 9270",
	.fw_name_pre = IWL9260_FW_PRE,
	IWL_DEVICE_9000,
	.ht_params = &iwl9000_ht_params,
	.nvm_ver = IWL9000_NVM_VERSION,
@@ -170,8 +176,8 @@ const struct iwl_cfg iwl9260lc_2ac_cfg = {
	.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
};

const struct iwl_cfg iwl5165_2ac_cfg = {
		.name = "Intel(R) Dual Band Wireless AC 5165",
const struct iwl_cfg iwl9460_2ac_cfg = {
	.name = "Intel(R) Dual Band Wireless AC 9460",
	.fw_name_pre = IWL9000_FW_PRE,
	IWL_DEVICE_9000,
	.ht_params = &iwl9000_ht_params,
@@ -181,6 +187,21 @@ const struct iwl_cfg iwl5165_2ac_cfg = {
	.integrated = true,
};

/*
 * TODO the struct below is for internal testing only this should be
 * removed by EO 2016~
 */
const struct iwl_cfg iwl9000lc_2ac_cfg = {
	.name = "Intel(R) Dual Band Wireless AC 9000",
	.fw_name_pre = IWL9000LC_FW_PRE,
	IWL_DEVICE_9000,
	.ht_params = &iwl9000_ht_params,
	.nvm_ver = IWL9000_NVM_VERSION,
	.nvm_calib_ver = IWL9000_TX_POWER_VERSION,
	.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
	.integrated = true,
};

MODULE_FIRMWARE(IWL9000_MODULE_FIRMWARE(IWL9000_UCODE_API_MAX));
MODULE_FIRMWARE(IWL9260_MODULE_FIRMWARE(IWL9000_UCODE_API_MAX));
MODULE_FIRMWARE(IWL9260LC_MODULE_FIRMWARE(IWL9000_UCODE_API_MAX));
MODULE_FIRMWARE(IWL9000LC_MODULE_FIRMWARE(IWL9000_UCODE_API_MAX));
+4 −2
Original line number Diff line number Diff line
@@ -449,9 +449,11 @@ extern const struct iwl_cfg iwl4165_2ac_cfg;
extern const struct iwl_cfg iwl8260_2ac_sdio_cfg;
extern const struct iwl_cfg iwl8265_2ac_sdio_cfg;
extern const struct iwl_cfg iwl4165_2ac_sdio_cfg;
extern const struct iwl_cfg iwl9000lc_2ac_cfg;
extern const struct iwl_cfg iwl9160_2ac_cfg;
extern const struct iwl_cfg iwl9260_2ac_cfg;
extern const struct iwl_cfg iwl9260lc_2ac_cfg;
extern const struct iwl_cfg iwl5165_2ac_cfg;
extern const struct iwl_cfg iwl9270_2ac_cfg;
extern const struct iwl_cfg iwl9460_2ac_cfg;
extern const struct iwl_cfg iwla000_2ac_cfg;
#endif /* CONFIG_IWLMVM */

+7 −8
Original line number Diff line number Diff line
@@ -77,7 +77,6 @@
 */
#define FH_MEM_LOWER_BOUND                   (0x1000)
#define FH_MEM_UPPER_BOUND                   (0x2000)
#define TFH_MEM_LOWER_BOUND                  (0xA06000)

/**
 * Keep-Warm (KW) buffer base address.
@@ -120,7 +119,7 @@
#define FH_MEM_CBBC_20_31_LOWER_BOUND		(FH_MEM_LOWER_BOUND + 0xB20)
#define FH_MEM_CBBC_20_31_UPPER_BOUND		(FH_MEM_LOWER_BOUND + 0xB80)
/* a000 TFD table address, 64 bit */
#define TFH_TFDQ_CBB_TABLE			(TFH_MEM_LOWER_BOUND + 0x1C00)
#define TFH_TFDQ_CBB_TABLE			(0x1C00)

/* Find TFD CB base pointer for given queue */
static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans,
@@ -156,7 +155,7 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans,
 * In case of DRAM read address which is not aligned to 128B, the TFH will
 * enable transfer size which doesn't cross 64B DRAM address boundary.
*/
#define TFH_TRANSFER_MODE		(TFH_MEM_LOWER_BOUND + 0x1F40)
#define TFH_TRANSFER_MODE		(0x1F40)
#define TFH_TRANSFER_MAX_PENDING_REQ	0xc
#define TFH_CHUNK_SIZE_128			BIT(8)
#define TFH_CHUNK_SPLIT_MODE		BIT(10)
@@ -167,7 +166,7 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans,
 * the start of the TFD first TB.
 * In case of a DRAM Tx CMD update the TFH will update PN and Key ID
 */
#define TFH_TXCMD_UPDATE_CFG		(TFH_MEM_LOWER_BOUND + 0x1F48)
#define TFH_TXCMD_UPDATE_CFG		(0x1F48)
/*
 * Controls TX DMA operation
 *
@@ -181,22 +180,22 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans,
 * set to 1 - interrupt is sent to the driver
 * Bit 0: Indicates the snoop configuration
*/
#define TFH_SRV_DMA_CHNL0_CTRL	(TFH_MEM_LOWER_BOUND + 0x1F60)
#define TFH_SRV_DMA_CHNL0_CTRL	(0x1F60)
#define TFH_SRV_DMA_SNOOP	BIT(0)
#define TFH_SRV_DMA_TO_DRIVER	BIT(24)
#define TFH_SRV_DMA_START	BIT(31)

/* Defines the DMA SRAM write start address to transfer a data block */
#define TFH_SRV_DMA_CHNL0_SRAM_ADDR	(TFH_MEM_LOWER_BOUND + 0x1F64)
#define TFH_SRV_DMA_CHNL0_SRAM_ADDR	(0x1F64)

/* Defines the 64bits DRAM start address to read the DMA data block from */
#define TFH_SRV_DMA_CHNL0_DRAM_ADDR	(TFH_MEM_LOWER_BOUND + 0x1F68)
#define TFH_SRV_DMA_CHNL0_DRAM_ADDR	(0x1F68)

/*
 * Defines the number of bytes to transfer from DRAM to SRAM.
 * Note that this register may be configured with non-dword aligned size.
 */
#define TFH_SRV_DMA_CHNL0_BC	(TFH_MEM_LOWER_BOUND + 0x1F70)
#define TFH_SRV_DMA_CHNL0_BC	(0x1F70)

/**
 * Rx SRAM Control and Status Registers (RSCSR)
+7 −12
Original line number Diff line number Diff line
@@ -302,22 +302,17 @@
#define OSC_CLK_FORCE_CONTROL		(0x8)

#define FH_UCODE_LOAD_STATUS		(0x1AF0)
#define CSR_UCODE_LOAD_STATUS_ADDR	(0x1E70)
enum secure_load_status_reg {
	LMPM_CPU_UCODE_LOADING_STARTED			= 0x00000001,
	LMPM_CPU_HDRS_LOADING_COMPLETED			= 0x00000003,
	LMPM_CPU_UCODE_LOADING_COMPLETED		= 0x00000007,
	LMPM_CPU_STATUS_NUM_OF_LAST_COMPLETED		= 0x000000F8,
	LMPM_CPU_STATUS_NUM_OF_LAST_LOADED_BLOCK	= 0x0000FF00,
};

#define LMPM_SECURE_INSPECTOR_CODE_ADDR	(0x1E38)
#define LMPM_SECURE_INSPECTOR_DATA_ADDR	(0x1E3C)
/*
 * Replacing FH_UCODE_LOAD_STATUS
 * This register is writen by driver and is read by uCode during boot flow.
 * Note this address is cleared after MAC reset.
 */
#define UREG_UCODE_LOAD_STATUS		(0xa05c40)

#define LMPM_SECURE_UCODE_LOAD_CPU1_HDR_ADDR	(0x1E78)
#define LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR	(0x1E7C)

#define LMPM_SECURE_INSPECTOR_CODE_MEM_SPACE	(0x400000)
#define LMPM_SECURE_INSPECTOR_DATA_MEM_SPACE	(0x402000)
#define LMPM_SECURE_CPU1_HDR_MEM_SPACE		(0x420000)
#define LMPM_SECURE_CPU2_HDR_MEM_SPACE		(0x420400)

+24 −7
Original line number Diff line number Diff line
@@ -432,26 +432,43 @@ struct iwl_mvm_rm_sta_cmd {
	u8 reserved[3];
} __packed; /* REMOVE_STA_CMD_API_S_VER_2 */

/**
 * struct iwl_mvm_mgmt_mcast_key_cmd_v1
 * ( MGMT_MCAST_KEY = 0x1f )
 * @ctrl_flags: %iwl_sta_key_flag
 * @igtk:
 * @k1: unused
 * @k2: unused
 * @sta_id: station ID that support IGTK
 * @key_id:
 * @receive_seq_cnt: initial RSC/PN needed for replay check
 */
struct iwl_mvm_mgmt_mcast_key_cmd_v1 {
	__le32 ctrl_flags;
	u8 igtk[16];
	u8 k1[16];
	u8 k2[16];
	__le32 key_id;
	__le32 sta_id;
	__le64 receive_seq_cnt;
} __packed; /* SEC_MGMT_MULTICAST_KEY_CMD_API_S_VER_1 */

/**
 * struct iwl_mvm_mgmt_mcast_key_cmd
 * ( MGMT_MCAST_KEY = 0x1f )
 * @ctrl_flags: %iwl_sta_key_flag
 * @IGTK:
 * @K1: unused
 * @K2: unused
 * @igtk: IGTK master key
 * @sta_id: station ID that support IGTK
 * @key_id:
 * @receive_seq_cnt: initial RSC/PN needed for replay check
 */
struct iwl_mvm_mgmt_mcast_key_cmd {
	__le32 ctrl_flags;
	u8 IGTK[16];
	u8 K1[16];
	u8 K2[16];
	u8 igtk[32];
	__le32 key_id;
	__le32 sta_id;
	__le64 receive_seq_cnt;
} __packed; /* SEC_MGMT_MULTICAST_KEY_CMD_API_S_VER_1 */
} __packed; /* SEC_MGMT_MULTICAST_KEY_CMD_API_S_VER_2 */

struct iwl_mvm_wep_key {
	u8 key_index;
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