r8169: support new chips of RTL8111F (c2218925) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/net/ethernet/realtek/r8169.c

+178 −2

Original line number	Diff line number	Diff line
		@@ -42,6 +42,8 @@
		#define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
		#define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
		#define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
		#define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
		#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
		#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"

		#ifdef RTL8169_DEBUG
		@@ -133,6 +135,8 @@ enum mac_version {
		RTL_GIGA_MAC_VER_32,
		RTL_GIGA_MAC_VER_33,
		RTL_GIGA_MAC_VER_34,
		RTL_GIGA_MAC_VER_35,
		RTL_GIGA_MAC_VER_36,
		RTL_GIGA_MAC_NONE = 0xff,
		};

		@@ -218,7 +222,11 @@ static const struct {
		[RTL_GIGA_MAC_VER_33] =
		_R("RTL8168e/8111e", RTL_TD_1, FIRMWARE_8168E_2),
		[RTL_GIGA_MAC_VER_34] =
		_R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3)
		_R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3),
		[RTL_GIGA_MAC_VER_35] =
		_R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_1),
		[RTL_GIGA_MAC_VER_36] =
		_R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_2)
		};
		#undef _R

		@@ -715,6 +723,8 @@ MODULE_FIRMWARE(FIRMWARE_8168E_1);
		MODULE_FIRMWARE(FIRMWARE_8168E_2);
		MODULE_FIRMWARE(FIRMWARE_8168E_3);
		MODULE_FIRMWARE(FIRMWARE_8105E_1);
		MODULE_FIRMWARE(FIRMWARE_8168F_1);
		MODULE_FIRMWARE(FIRMWARE_8168F_2);

		static int rtl8169_open(struct net_device *dev);
		static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
		@@ -1203,6 +1213,19 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)
		ERIAR_EXGMAC);
		rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x01, 0x00,
		ERIAR_EXGMAC);
		} else if (tp->mac_version == RTL_GIGA_MAC_VER_35 \|\|
		tp->mac_version == RTL_GIGA_MAC_VER_36) {
		if (RTL_R8(PHYstatus) & _1000bpsF) {
		rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111,
		0x00000011, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0x1dc, ERIAR_MASK_1111,
		0x00000005, ERIAR_EXGMAC);
		} else {
		rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111,
		0x0000001f, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0x1dc, ERIAR_MASK_1111,
		0x0000003f, ERIAR_EXGMAC);
		}
		}
		}

		@@ -1742,6 +1765,10 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
		u32 val;
		int mac_version;
		} mac_info[] = {
		/* 8168F family. */
		{ 0x7cf00000, 0x48100000, RTL_GIGA_MAC_VER_36 },
		{ 0x7cf00000, 0x48000000, RTL_GIGA_MAC_VER_35 },

		/* 8168E family. */
		{ 0x7c800000, 0x2c800000, RTL_GIGA_MAC_VER_34 },
		{ 0x7cf00000, 0x2c200000, RTL_GIGA_MAC_VER_33 },
		@@ -2876,6 +2903,97 @@ static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp)
		rtl_writephy(tp, 0x1f, 0x0000);
		}

		static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)
		{
		static const struct phy_reg phy_reg_init[] = {
		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },

		/* Modify green table for giga & fnet */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b55 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b5e },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b67 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b70 },
		{ 0x06, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0078 },
		{ 0x17, 0x0000 },
		{ 0x19, 0x00fb },
		{ 0x1f, 0x0000 },

		/* Modify green table for 10M */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b79 },
		{ 0x06, 0xaa00 },
		{ 0x1f, 0x0000 },

		/* Disable hiimpedance detection (RTCT) */
		{ 0x1f, 0x0003 },
		{ 0x01, 0x328a },
		{ 0x1f, 0x0000 }
		};

		rtl_apply_firmware(tp);

		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

		/* For 4-corner performance improve */
		rtl_writephy(tp, 0x1f, 0x0005);
		rtl_writephy(tp, 0x05, 0x8b80);
		rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);

		/* PHY auto speed down */
		rtl_writephy(tp, 0x1f, 0x0007);
		rtl_writephy(tp, 0x1e, 0x002d);
		rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);
		rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

		/* Improve 10M EEE waveform */
		rtl_writephy(tp, 0x1f, 0x0005);
		rtl_writephy(tp, 0x05, 0x8b86);
		rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);

		/* Improve 2-pair detection performance */
		rtl_writephy(tp, 0x1f, 0x0005);
		rtl_writephy(tp, 0x05, 0x8b85);
		rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);
		}

		static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
		{
		rtl_apply_firmware(tp);

		/* For 4-corner performance improve */
		rtl_writephy(tp, 0x1f, 0x0005);
		rtl_writephy(tp, 0x05, 0x8b80);
		rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);

		/* PHY auto speed down */
		rtl_writephy(tp, 0x1f, 0x0007);
		rtl_writephy(tp, 0x1e, 0x002d);
		rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);
		rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

		/* Improve 10M EEE waveform */
		rtl_writephy(tp, 0x1f, 0x0005);
		rtl_writephy(tp, 0x05, 0x8b86);
		rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
		rtl_writephy(tp, 0x1f, 0x0000);
		}

		static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
		{
		static const struct phy_reg phy_reg_init[] = {
		@@ -3000,6 +3118,12 @@ static void rtl_hw_phy_config(struct net_device *dev)
		case RTL_GIGA_MAC_VER_34:
		rtl8168e_2_hw_phy_config(tp);
		break;
		case RTL_GIGA_MAC_VER_35:
		rtl8168f_1_hw_phy_config(tp);
		break;
		case RTL_GIGA_MAC_VER_36:
		rtl8168f_2_hw_phy_config(tp);
		break;

		default:
		break;
		@@ -3535,6 +3659,8 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
		case RTL_GIGA_MAC_VER_32:
		case RTL_GIGA_MAC_VER_33:
		case RTL_GIGA_MAC_VER_34:
		case RTL_GIGA_MAC_VER_35:
		case RTL_GIGA_MAC_VER_36:
		ops->down = r8168_pll_power_down;
		ops->up = r8168_pll_power_up;
		break;
		@@ -4009,7 +4135,9 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
		tp->mac_version == RTL_GIGA_MAC_VER_31) {
		while (RTL_R8(TxPoll) & NPQ)
		udelay(20);
		} else if (tp->mac_version == RTL_GIGA_MAC_VER_34) {
		} else if (tp->mac_version == RTL_GIGA_MAC_VER_34 \|\|
		tp->mac_version == RTL_GIGA_MAC_VER_35 \|\|
		tp->mac_version == RTL_GIGA_MAC_VER_36) {
		RTL_W8(ChipCmd, RTL_R8(ChipCmd) \| StopReq);
		while (!(RTL_R32(TxConfig) & TXCFG_EMPTY))
		udelay(100);
		@@ -4495,6 +4623,49 @@ static void rtl_hw_start_8168e_2(void __iomem ioaddr, struct pci_dev pdev)
		RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
		}

		static void rtl_hw_start_8168f_1(void __iomem ioaddr, struct pci_dev pdev)
		{
		static const struct ephy_info e_info_8168f_1[] = {
		{ 0x06, 0x00c0, 0x0020 },
		{ 0x08, 0x0001, 0x0002 },
		{ 0x09, 0x0000, 0x0080 },
		{ 0x19, 0x0000, 0x0224 }
		};

		rtl_csi_access_enable_1(ioaddr);

		rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));

		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

		rtl_eri_write(ioaddr, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
		rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
		rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
		rtl_w1w0_eri(ioaddr, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
		rtl_w1w0_eri(ioaddr, 0x1d0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);
		rtl_eri_write(ioaddr, 0xd0, ERIAR_MASK_1111, 0x00000060, ERIAR_EXGMAC);
		rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00,
		ERIAR_EXGMAC);

		RTL_W8(MaxTxPacketSize, EarlySize);

		rtl_disable_clock_request(pdev);

		RTL_W32(TxConfig, RTL_R32(TxConfig) \| TXCFG_AUTO_FIFO);
		RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

		/* Adjust EEE LED frequency */
		RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);

		RTL_W8(DLLPR, RTL_R8(DLLPR) \| PFM_EN);
		RTL_W32(MISC, RTL_R32(MISC) \| PWM_EN);
		RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
		}

		static void rtl_hw_start_8168(struct net_device *dev)
		{
		struct rtl8169_private *tp = netdev_priv(dev);
		@@ -4589,6 +4760,11 @@ static void rtl_hw_start_8168(struct net_device *dev)
		rtl_hw_start_8168e_2(ioaddr, pdev);
		break;

		case RTL_GIGA_MAC_VER_35:
		case RTL_GIGA_MAC_VER_36:
		rtl_hw_start_8168f_1(ioaddr, pdev);
		break;

		default:
		printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
		dev->name, tp->mac_version);