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Commit c1e9af0c authored by Hariprasad Shenai's avatar Hariprasad Shenai Committed by David S. Miller
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cxgb4: Use FW LDST cmd to access TP_PIO_{ADDR, DATA} register first 



The TP_PIO_{ADDR,DATA} registers are are in conflict with the firmware's
use of these registers. Added a routine to access it through FW LDST
cmd.
Access all TP_PIO_{ADDR,DATA} register access through new routine if FW
is alive. If firmware is dead, than fall back to indirect access.

Signed-off-by: default avatarHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent eca0f6ee

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -4068,8 +4068,8 @@ static int adap_init0(struct adapter *adap) 
			     adap->params.b_wnd);

			     adap->params.b_wnd);

	}

	}

	t4_init_sge_params(adap);

	t4_init_sge_params(adap);

	t4_init_tp_params(adap);

	adap->flags |= FW_OK;

	adap->flags |= FW_OK;

	t4_init_tp_params(adap);

	return 0;

	return 0;





	/*

	/*

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

+82 −20
Original line number Original line Diff line number Diff line
@@ -3632,6 +3632,40 @@ int t4_read_rss(struct adapter *adapter, u16 *map) 
	return 0;

	return 0;

}

}





/**

 *	t4_fw_tp_pio_rw - Access TP PIO through LDST

 *	@adap: the adapter

 *	@vals: where the indirect register values are stored/written

 *	@nregs: how many indirect registers to read/write

 *	@start_idx: index of first indirect register to read/write

 *	@rw: Read (1) or Write (0)

 *

 *	Access TP PIO registers through LDST

 */

static void t4_fw_tp_pio_rw(struct adapter *adap, u32 *vals, unsigned int nregs,

			    unsigned int start_index, unsigned int rw)

{

	int ret, i;

	int cmd = FW_LDST_ADDRSPC_TP_PIO;

	struct fw_ldst_cmd c;



	for (i = 0 ; i < nregs; i++) {

		memset(&c, 0, sizeof(c));

		c.op_to_addrspace = cpu_to_be32(FW_CMD_OP_V(FW_LDST_CMD) |

						FW_CMD_REQUEST_F |

						(rw ? FW_CMD_READ_F :

						      FW_CMD_WRITE_F) |

						FW_LDST_CMD_ADDRSPACE_V(cmd));

		c.cycles_to_len16 = cpu_to_be32(FW_LEN16(c));



		c.u.addrval.addr = cpu_to_be32(start_index + i);

		c.u.addrval.val  = rw ? 0 : cpu_to_be32(vals[i]);

		ret = t4_wr_mbox(adap, adap->mbox, &c, sizeof(c), &c);

		if (!ret && rw)

			vals[i] = be32_to_cpu(c.u.addrval.val);

	}

}



/**

/**

 *	t4_read_rss_key - read the global RSS key

 *	t4_read_rss_key - read the global RSS key

 *	@adap: the adapter

 *	@adap: the adapter
@@ -3641,6 +3675,9 @@ int t4_read_rss(struct adapter *adapter, u16 *map) 
 */

 */

void t4_read_rss_key(struct adapter *adap, u32 *key)

void t4_read_rss_key(struct adapter *adap, u32 *key)

{

{

	if (adap->flags & FW_OK)

		t4_fw_tp_pio_rw(adap, key, 10, TP_RSS_SECRET_KEY0_A, 1);

	else

		t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,

		t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,

				 TP_RSS_SECRET_KEY0_A);

				 TP_RSS_SECRET_KEY0_A);

}

}
@@ -3668,6 +3705,9 @@ void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx) 
	    (vrt & KEYEXTEND_F) && (KEYMODE_G(vrt) == 3))

	    (vrt & KEYEXTEND_F) && (KEYMODE_G(vrt) == 3))

		rss_key_addr_cnt = 32;

		rss_key_addr_cnt = 32;





	if (adap->flags & FW_OK)

		t4_fw_tp_pio_rw(adap, (void *)key, 10, TP_RSS_SECRET_KEY0_A, 0);

	else

		t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,

		t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,

				  TP_RSS_SECRET_KEY0_A);

				  TP_RSS_SECRET_KEY0_A);
@@ -3694,6 +3734,10 @@ void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx) 
void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,

void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,

			   u32 *valp)

			   u32 *valp)

{

{

	if (adapter->flags & FW_OK)

		t4_fw_tp_pio_rw(adapter, valp, 1,

				TP_RSS_PF0_CONFIG_A + index, 1);

	else

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 valp, 1, TP_RSS_PF0_CONFIG_A + index);

				 valp, 1, TP_RSS_PF0_CONFIG_A + index);

}

}
@@ -3730,11 +3774,16 @@ void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 




	/* Grab the VFL/VFH values ...

	/* Grab the VFL/VFH values ...

	 */

	 */

	if (adapter->flags & FW_OK) {

		t4_fw_tp_pio_rw(adapter, vfl, 1, TP_RSS_VFL_CONFIG_A, 1);

		t4_fw_tp_pio_rw(adapter, vfh, 1, TP_RSS_VFH_CONFIG_A, 1);

	} else {

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 vfl, 1, TP_RSS_VFL_CONFIG_A);

				 vfl, 1, TP_RSS_VFL_CONFIG_A);

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 vfh, 1, TP_RSS_VFH_CONFIG_A);

				 vfh, 1, TP_RSS_VFH_CONFIG_A);

	}

	}

}





/**

/**

 *	t4_read_rss_pf_map - read PF RSS Map

 *	t4_read_rss_pf_map - read PF RSS Map
@@ -3746,6 +3795,9 @@ u32 t4_read_rss_pf_map(struct adapter *adapter) 
{

{

	u32 pfmap;

	u32 pfmap;





	if (adapter->flags & FW_OK)

		t4_fw_tp_pio_rw(adapter, &pfmap, 1, TP_RSS_PF_MAP_A, 1);

	else

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 &pfmap, 1, TP_RSS_PF_MAP_A);

				 &pfmap, 1, TP_RSS_PF_MAP_A);

	return pfmap;

	return pfmap;
@@ -3761,6 +3813,9 @@ u32 t4_read_rss_pf_mask(struct adapter *adapter) 
{

{

	u32 pfmask;

	u32 pfmask;





	if (adapter->flags & FW_OK)

		t4_fw_tp_pio_rw(adapter, &pfmask, 1, TP_RSS_PF_MSK_A, 1);

	else

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 &pfmask, 1, TP_RSS_PF_MSK_A);

				 &pfmask, 1, TP_RSS_PF_MSK_A);

	return pfmask;

	return pfmask;
@@ -6137,12 +6192,19 @@ int t4_init_tp_params(struct adapter *adap) 
	/* Cache the adapter's Compressed Filter Mode and global Incress

	/* Cache the adapter's Compressed Filter Mode and global Incress

	 * Configuration.

	 * Configuration.

	 */

	 */

	if (adap->flags & FW_OK) {

		t4_fw_tp_pio_rw(adap, &adap->params.tp.vlan_pri_map, 1,

				TP_VLAN_PRI_MAP_A, 1);

		t4_fw_tp_pio_rw(adap, &adap->params.tp.ingress_config, 1,

				TP_INGRESS_CONFIG_A, 1);

	} else {

		t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 &adap->params.tp.vlan_pri_map, 1,

				 &adap->params.tp.vlan_pri_map, 1,

				 TP_VLAN_PRI_MAP_A);

				 TP_VLAN_PRI_MAP_A);

		t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,

		t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,

				 &adap->params.tp.ingress_config, 1,

				 &adap->params.tp.ingress_config, 1,

				 TP_INGRESS_CONFIG_A);

				 TP_INGRESS_CONFIG_A);

	}





	/* Now that we have TP_VLAN_PRI_MAP cached, we can calculate the field

	/* Now that we have TP_VLAN_PRI_MAP cached, we can calculate the field

	 * shift positions of several elements of the Compressed Filter Tuple

	 * shift positions of several elements of the Compressed Filter Tuple