Commit c1d7cd22 authored Jul 28, 2015 by Will Deacon

arm64: spinlock: fix ll/sc unlock on big-endian systems



When unlocking a spinlock, we perform a read-modify-write on the owner
ticket in order to increment it and store it back with release
semantics.

In the LL/SC case, we load the 16-bit ticket using a 32-bit load and
therefore store back the wrong halfword on a big-endian system,
corrupting the lock after the first unlock and killing the system dead.

This patch fixes the unlock code to use 16-bit accessors consistently.

Signed-off-by: Will Deacon <will.deacon@arm.com>

parent 4150e50b

arch/arm64/include/asm/spinlock.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -110,7 +110,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)

	asm volatile(ARM64_LSE_ATOMIC_INSN(		asm volatile(ARM64_LSE_ATOMIC_INSN(
	/* LL/SC */		/* LL/SC */
	" ldr %w1, %0\n"		" ldrh %w1, %0\n"
	" add %w1, %w1, #1\n"		" add %w1, %w1, #1\n"
	" stlrh %w1, %0",		" stlrh %w1, %0",
	/* LSE atomics */		/* LSE atomics */