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Commit c12ddfe1 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: gemini: convert to MULTI_IRQ_HANDLER 



In order to enable device tree boot on this machine we must first
convert it to runtime-manage its irq handler, so do this.

Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent c1ae3cfa

arch/arm/Kconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -365,6 +365,7 @@ config ARCH_GEMINI 
	select CPU_FA526

	select CPU_FA526

	select GENERIC_CLOCKEVENTS

	select GENERIC_CLOCKEVENTS

	select GPIOLIB

	select GPIOLIB

	select MULTI_IRQ_HANDLER

	help

	help

	  Support for the Cortina Systems Gemini family SoCs

	  Support for the Cortina Systems Gemini family SoCs

arch/arm/mach-gemini/include/mach/entry-macro.S

deleted100644 → 0
+0 −33
Original line number Original line Diff line number Diff line 
/*

 * Low-level IRQ helper macros for Gemini platform.

 *

 *  Copyright (C) 2001-2006 Storlink, Corp.

 *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>

 *

 * This file is licensed under  the terms of the GNU General Public

 * License version 2. This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */

#include <mach/hardware.h>



#define IRQ_STATUS	0x14



	.macro  get_irqnr_preamble, base, tmp

	.endm



	.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp

	ldr     \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)

	ldr     \irqnr, [\irqstat]

	cmp     \irqnr, #0

	beq     2313f

	mov     \tmp, \irqnr

	mov     \irqnr, #0

2312:

	tst     \tmp, #1

	bne     2313f

	add     \irqnr, \irqnr, #1

	mov     \tmp, \tmp, lsr #1

	cmp     \irqnr, #31

	bcc     2312b

2313:

	.endm

arch/arm/mach-gemini/irq.c

+15 −0
Original line number Original line Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/sched.h>

#include <linux/sched.h>

#include <linux/cpu.h>

#include <linux/cpu.h>





#include <asm/exception.h>

#include <asm/irq.h>

#include <asm/irq.h>

#include <asm/mach/irq.h>

#include <asm/mach/irq.h>

#include <asm/system_misc.h>

#include <asm/system_misc.h>
@@ -65,6 +66,18 @@ static struct irq_chip gemini_irq_chip = { 
	.irq_unmask	= gemini_unmask_irq,

	.irq_unmask	= gemini_unmask_irq,

};

};







asmlinkage void __exception_irq_entry gemini_handle_irq(struct pt_regs *regs)

{

	int irq;

	unsigned status;



	while ((status = __raw_readl(IRQ_STATUS(IO_ADDRESS(GEMINI_INTERRUPT_BASE))))) {

		irq = ffs(status) - 1;

		handle_domain_irq(NULL, irq, regs);

	}

}



static struct resource irq_resource = {

static struct resource irq_resource = {

	.name	= "irq_handler",

	.name	= "irq_handler",

	.start	= GEMINI_INTERRUPT_BASE,

	.start	= GEMINI_INTERRUPT_BASE,
@@ -102,4 +115,6 @@ void __init gemini_init_irq(void) 
	/* Set interrupt mode */

	/* Set interrupt mode */

	__raw_writel(mode, IRQ_TMODE(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));

	__raw_writel(mode, IRQ_TMODE(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));

	__raw_writel(level, IRQ_TLEVEL(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));

	__raw_writel(level, IRQ_TLEVEL(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));



	set_handle_irq(gemini_handle_irq);

}
 
}