Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c10d342f authored by Amit Nischal's avatar Amit Nischal Committed by Odelu Kukatla
Browse files

ARM: dts: msm: Update the clock_gcc node on SM6150 



Update the GCC clock controller device node to register to
actual GCC driver. Also update the GCC GDSCs by replacing
the dummy nodes with actual GDSC regulator driver.

Change-Id: I15197e2d84a8ae4497020e3aff9252c0e02ef9e2
Signed-off-by: default avatarAmit Nischal <anischal@codeaurora.org>
parent cba44bdd

arch/arm64/boot/dts/qcom/sm6150-gdsc.dtsi

+12 −30
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
&soc {

	/* GDSCs in Global CC */

	emac_gdsc: qcom,gdsc@106004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "emac_gdsc";

		reg = <0x106004 0x4>;

		qcom,poll-cfg-gdscr;
@@ -22,7 +22,7 @@ 
	};



	pcie_0_gdsc: qcom,gdsc@16b004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "pcie_0_gdsc";

		reg = <0x16b004 0x4>;

		qcom,poll-cfg-gdscr;
@@ -30,7 +30,7 @@ 
	};



	ufs_phy_gdsc: qcom,gdsc@177004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "ufs_phy_gdsc";

		reg = <0x177004 0x4>;

		qcom,poll-cfg-gdscr;
@@ -38,7 +38,7 @@ 
	};



	usb20_sec_gdsc: qcom,gdsc@1a6004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "usb20_sec_gdsc";

		reg = <0x1a6004 0x4>;

		qcom,poll-cfg-gdscr;
@@ -46,7 +46,7 @@ 
	};



	usb30_prim_gdsc: qcom,gdsc@10f004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "usb30_prim_gdsc";

		reg = <0x10f004 0x4>;

		qcom,poll-cfg-gdscr;
@@ -54,7 +54,7 @@ 
	};



	hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc: qcom,gdsc@17d040 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";

		reg = <0x17d040 0x4>;

		qcom,no-status-check-on-disable;
@@ -63,7 +63,7 @@ 
	};



	hlos1_vote_aggre_noc_mmu_tbu1_gdsc: qcom,gdsc@17d044 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";

		reg = <0x17d044 0x4>;

		qcom,no-status-check-on-disable;
@@ -72,7 +72,7 @@ 
	};



	hlos1_vote_aggre_noc_mmu_tbu2_gdsc: qcom,gdsc@17d048 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";

		reg = <0x17d048 0x4>;

		qcom,no-status-check-on-disable;
@@ -81,7 +81,7 @@ 
	};



	hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc: qcom,gdsc@17d04c {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";

		reg = <0x17d04c 0x4>;

		qcom,no-status-check-on-disable;
@@ -90,7 +90,7 @@ 
	};



	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d050 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";

		reg = <0x17d050 0x4>;

		qcom,no-status-check-on-disable;
@@ -99,7 +99,7 @@ 
	};



	hlos1_vote_mmnoc_mmu_tbu_sf_gdsc: qcom,gdsc@17d054 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";

		reg = <0x17d054 0x4>;

		qcom,no-status-check-on-disable;
@@ -108,7 +108,7 @@ 
	};



	hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@17d058 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";

		reg = <0x17d058 0x4>;

		qcom,no-status-check-on-disable;
@@ -116,24 +116,6 @@ 
		status = "disabled";

	};



	hlos1_vote_turing_mmu_tbu0_gdsc: qcom,gdsc@17d05c {

		compatible = "regulator-fixed";

		regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";

		reg = <0x17d05c 0x4>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	hlos1_vote_turing_mmu_tbu1_gdsc: qcom,gdsc@17d060 {

		compatible = "regulator-fixed";

		regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";

		reg = <0x17d060 0x4>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	/* GDSCs in Camera CC */

	bps_gdsc: qcom,gdsc@ad06004 {

		compatible = "regulator-fixed";

arch/arm64/boot/dts/qcom/sm6150.dtsi

+5 −10
Original line number Diff line number Diff line
@@ -609,8 +609,11 @@ 
	};



	clock_gcc: qcom,gcc {

		compatible = "qcom,dummycc";

		clock-output-names = "gcc_clocks";

		compatible = "qcom,gcc-sm6150", "syscon";

		reg = <0x100000 0x1f0000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&pm6150_s1_level>;

		vdd_cx_ao-supply = <&pm6150_s1_level_ao>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};
@@ -1577,14 +1580,6 @@ 
	status = "ok";

};



&hlos1_vote_turing_mmu_tbu0_gdsc {

	status = "ok";

};



&hlos1_vote_turing_mmu_tbu1_gdsc {

	status = "ok";

};



&bps_gdsc {

	status = "ok";

};