Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c09b0edc authored by Mangesh Kunchamwar's avatar Mangesh Kunchamwar
Browse files

ARM: dts: msm: Add ep92 HDMI bridge support for qcs405 



Add support for EP92A6 chipset with SPDIF and I2S input on qcs405.

Change-Id: I9e4ac4beceb06d1ac1d62700a9cdfe89cc68b7a9
Signed-off-by: default avatarRalf Herz <rherz@codeaurora.org>
Signed-off-by: default avatarMangesh Kunchamwar <mangeshk@codeaurora.org>
parent a9cdbef8

Documentation/devicetree/bindings/sound/ep92a6.txt

0 → 100644
+17 −0
Original line number Diff line number Diff line 
EP92A6 HDMI bridge chip



This device supports I2C mode only.



Required properties:

  - compatible : "explore,ep92a6"

  - reg : the I2C address of the device



Optional properties:

  - interrupts : interrupt line that signals state update



Example:



ep92a6: ep92a6@64 {

   compatible = "explore,ep92a6";

   reg = <0x64>;

};

Documentation/devicetree/bindings/vendor-prefixes.txt

+1 −0
Original line number Diff line number Diff line
@@ -113,6 +113,7 @@ everest Everest Semiconductor Co. Ltd. 
everspin	Everspin Technologies, Inc.

exar	Exar Corporation

excito	Excito

explore Explore Semiconductor, Inc. Limited

ezchip	EZchip Semiconductor

faraday	Faraday Technology Corporation

fcs	Fairchild Semiconductor

arch/arm64/boot/dts/qcom/qcs405-audio-overlay.dtsi

+4 −1
Original line number Diff line number Diff line
@@ -47,7 +47,10 @@ 
		"VA DMIC7", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic7";

	pinctrl-names = "default";

	pinctrl-0 = <&spdifrx_opt_default>;

	pinctrl-0 = <&spdifrx_opt_default

		&sec_mi2s_sck_active &sec_mi2s_ws_active

		&sec_mi2s_sd0_active &sec_mi2s_sd1_active

		&sec_mi2s_sd2_active &sec_mi2s_sd3_active>;

};



&bolero {

arch/arm64/boot/dts/qcom/qcs405-audio.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -40,6 +40,19 @@ 
	};

};



&i2c_3 {

	status = "okay";

	qcom,clk-freq-out = <100000>;



	ep92a6_hdmi_64: ep92a6@64 {

		status = "okay";

		compatible = "explore,ep92a6";

		reg = <0x64>;

		interrupt-parent = <&tlmm>;

		interrupts = <107 IRQ_TYPE_EDGE_FALLING>;

	};

};



&q6core {

	qcs405_snd: sound {

		compatible = "qcom,qcs405-asoc-snd";
@@ -47,6 +60,11 @@ 
		qcom,mi2s-audio-intf = <1>;

		qcom,auxpcm-audio-intf = <1>;

		qcom,spdif-audio-intf = <1>;

		qcom,msm-mi2s-master = <1>, <0>, <1>, <1>, <1>;



		qcom,ep92-name = "ep92.3-0064";

		qcom,ep92-busnum  = <3>;

		qcom,ep92-reg  = <0x64>;



		asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,

				<&loopback>, <&compress>, <&hostless>,

arch/arm64/boot/dts/qcom/qcs405-csra1-audio-overlay.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -51,6 +51,15 @@ 
		"VA DMIC7", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic7",

		"CSRA_12 IN", "PRI_MI2S_RX";

	pinctrl-names = "default";

	pinctrl-0 = <&spdifrx_opt_default

		&pri_mi2s_sck_active &pri_mi2s_ws_active

		&pri_mi2s_sd0_active &pri_mi2s_sd1_active

		&pri_mi2s_sd2_active &pri_mi2s_sd3_active

		&pri_mi2s_sd4_active &pri_mi2s_sd5_active

		&sec_mi2s_sck_active &sec_mi2s_ws_active

		&sec_mi2s_sd0_active &sec_mi2s_sd1_active

		&sec_mi2s_sd2_active &sec_mi2s_sd3_active>;

};



&bolero {