Loading drivers/gpu/msm/adreno-gpulist.h +19 −0 Original line number Diff line number Diff line Loading @@ -400,4 +400,23 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .max_power = 5448, .va_padding = SZ_64K, }, { .gpurev = ADRENO_REV_A680, .core = 6, .major = 8, .minor = 0, .patchid = ANY_ID, .features = ADRENO_64BIT | ADRENO_RPMH | ADRENO_GPMU, .sqefw_name = "a630_sqe.fw", .zap_name = "a640_zap", .gpudev = &adreno_a6xx_gpudev, .gmem_size = SZ_2M, .num_protected_regs = 0x20, .busy_mask = 0xFFFFFFFE, .gpmufw_name = "a640_gmu.bin", .gpmu_major = 0x2, .gpmu_minor = 0x000, .gpmu_tsens = 0x000C000D, .max_power = 5448, }, }; drivers/gpu/msm/adreno.h +5 −3 Original line number Diff line number Diff line Loading @@ -213,6 +213,7 @@ enum adreno_gpurev { ADRENO_REV_A615 = 615, ADRENO_REV_A630 = 630, ADRENO_REV_A640 = 640, ADRENO_REV_A680 = 680, }; #define ADRENO_START_WARM 0 Loading Loading @@ -1251,6 +1252,7 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) ADRENO_TARGET(a615, ADRENO_REV_A615) ADRENO_TARGET(a630, ADRENO_REV_A630) ADRENO_TARGET(a640, ADRENO_REV_A640) ADRENO_TARGET(a680, ADRENO_REV_A680) static inline int adreno_is_a630v1(struct adreno_device *adreno_dev) { Loading Loading @@ -1891,10 +1893,10 @@ static inline bool adreno_has_sptprac_gdsc(struct adreno_device *adreno_dev) static inline bool adreno_has_gbif(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev) || adreno_is_a640(adreno_dev)) return true; else if (!adreno_is_a6xx(adreno_dev) || adreno_is_a630(adreno_dev)) return false; else return true; } /** Loading drivers/gpu/msm/adreno_a6xx.c +7 −11 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ static const struct adreno_vbif_platform a6xx_vbif_platforms[] = { { adreno_is_a630, a630_vbif }, { adreno_is_a615, a615_gbif }, { adreno_is_a640, a640_gbif }, { adreno_is_a680, a640_gbif }, }; struct kgsl_hwcg_reg { Loading Loading @@ -308,6 +309,7 @@ static const struct { {adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)}, {adreno_is_a615, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)}, {adreno_is_a640, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)}, {adreno_is_a680, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)}, }; static struct a6xx_protected_regs { Loading Loading @@ -541,12 +543,10 @@ static void a6xx_enable_64bit(struct adreno_device *adreno_dev) static inline unsigned int __get_rbbm_clock_cntl_on(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x8AA8AA82; else if (adreno_is_a640(adreno_dev)) return 0x8AA8AA82; else if (adreno_is_a630(adreno_dev)) return 0x8AA8AA02; else return 0x8AA8AA82; } static inline unsigned int Loading @@ -554,8 +554,6 @@ __get_gmu_ao_cgc_mode_cntl(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x00000222; else if (adreno_is_a640(adreno_dev)) return 0x00020202; else return 0x00020202; } Loading @@ -565,8 +563,6 @@ __get_gmu_ao_cgc_delay_cntl(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x00000111; else if (adreno_is_a640(adreno_dev)) return 0x00010111; else return 0x00010111; } Loading @@ -576,8 +572,6 @@ __get_gmu_ao_cgc_hyst_cntl(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x00000555; else if (adreno_is_a640(adreno_dev)) return 0x00005555; else return 0x00005555; } Loading Loading @@ -758,6 +752,8 @@ static void a6xx_start(struct adreno_device *adreno_dev) /* Setting the primFifo thresholds values */ if (adreno_is_a640(adreno_dev)) kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x400 << 11)); else if (adreno_is_a680(adreno_dev)) kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x800 << 11)); else kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x300 << 11)); Loading drivers/gpu/msm/adreno_a6xx_gmu.c +7 −6 Original line number Diff line number Diff line Loading @@ -551,7 +551,7 @@ static int a6xx_gmu_oob_set(struct adreno_device *adreno_dev, if (!gmu_core_isenabled(device)) return 0; if (adreno_is_a640(adreno_dev)) { if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev)) { set = BIT(30 - req * 2); check = BIT(31 - req); Loading Loading @@ -604,7 +604,7 @@ static inline void a6xx_gmu_oob_clear(struct adreno_device *adreno_dev, if (!gmu_core_isenabled(device)) return; if (adreno_is_a640(adreno_dev)) { if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev)) { clear = BIT(31 - req * 2); if (req >= 6) { dev_err(&gmu->pdev->dev, Loading @@ -626,11 +626,12 @@ static int a6xx_gmu_hfi_start_msg(struct adreno_device *adreno_dev) struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct hfi_start_cmd req; if (!adreno_is_a640(adreno_dev)) if (adreno_is_a640(adreno_dev) || adreno_is_a680(adreno_dev)) return hfi_send_req(KGSL_GMU_DEVICE(device), H2F_MSG_START, &req); return 0; /* Send hfi start msg */ return hfi_send_req(KGSL_GMU_DEVICE(device), H2F_MSG_START, &req); } #define FREQ_VOTE(idx, ack) (((idx) & 0xFF) | (((ack) & 0xF) << 28)) Loading drivers/gpu/msm/kgsl_hfi.c +6 −9 Original line number Diff line number Diff line Loading @@ -610,7 +610,7 @@ int hfi_start(struct kgsl_device *device, if (test_bit(GMU_HFI_ON, &gmu->flags)) return 0; if (!adreno_is_a640(adreno_dev)) { if (!adreno_is_a640(adreno_dev) && !adreno_is_a680(adreno_dev)) { result = hfi_send_gmu_init(gmu, boot_state); if (result) return result; Loading @@ -629,10 +629,12 @@ int hfi_start(struct kgsl_device *device, return result; /* * Send H2F_MSG_CORE_FW_START and features for A640 devices, * otherwise send H2F_MSG_TEST if quirk is enabled. * If quirk is enabled send H2F_MSG_TEST and tell the GMU * we are sending no more HFIs until the next boot otherwise * send H2F_MSG_CORE_FW_START and features for A640 devices */ if (adreno_is_a640(adreno_dev)) { if (HFI_VER_MAJOR(&gmu->hfi) >= 2) { result = hfi_send_feature_ctrls(gmu); if (result) return result; Loading @@ -641,17 +643,12 @@ int hfi_start(struct kgsl_device *device, if (result) return result; } else { /* * Tell the GMU we are sending no more HFIs * until the next boot */ if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_HFI_USE_REG)) { result = hfi_send_test(gmu); if (result) return result; } } set_bit(GMU_HFI_ON, &gmu->flags); return 0; } Loading Loading
drivers/gpu/msm/adreno-gpulist.h +19 −0 Original line number Diff line number Diff line Loading @@ -400,4 +400,23 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .max_power = 5448, .va_padding = SZ_64K, }, { .gpurev = ADRENO_REV_A680, .core = 6, .major = 8, .minor = 0, .patchid = ANY_ID, .features = ADRENO_64BIT | ADRENO_RPMH | ADRENO_GPMU, .sqefw_name = "a630_sqe.fw", .zap_name = "a640_zap", .gpudev = &adreno_a6xx_gpudev, .gmem_size = SZ_2M, .num_protected_regs = 0x20, .busy_mask = 0xFFFFFFFE, .gpmufw_name = "a640_gmu.bin", .gpmu_major = 0x2, .gpmu_minor = 0x000, .gpmu_tsens = 0x000C000D, .max_power = 5448, }, };
drivers/gpu/msm/adreno.h +5 −3 Original line number Diff line number Diff line Loading @@ -213,6 +213,7 @@ enum adreno_gpurev { ADRENO_REV_A615 = 615, ADRENO_REV_A630 = 630, ADRENO_REV_A640 = 640, ADRENO_REV_A680 = 680, }; #define ADRENO_START_WARM 0 Loading Loading @@ -1251,6 +1252,7 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) ADRENO_TARGET(a615, ADRENO_REV_A615) ADRENO_TARGET(a630, ADRENO_REV_A630) ADRENO_TARGET(a640, ADRENO_REV_A640) ADRENO_TARGET(a680, ADRENO_REV_A680) static inline int adreno_is_a630v1(struct adreno_device *adreno_dev) { Loading Loading @@ -1891,10 +1893,10 @@ static inline bool adreno_has_sptprac_gdsc(struct adreno_device *adreno_dev) static inline bool adreno_has_gbif(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev) || adreno_is_a640(adreno_dev)) return true; else if (!adreno_is_a6xx(adreno_dev) || adreno_is_a630(adreno_dev)) return false; else return true; } /** Loading
drivers/gpu/msm/adreno_a6xx.c +7 −11 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ static const struct adreno_vbif_platform a6xx_vbif_platforms[] = { { adreno_is_a630, a630_vbif }, { adreno_is_a615, a615_gbif }, { adreno_is_a640, a640_gbif }, { adreno_is_a680, a640_gbif }, }; struct kgsl_hwcg_reg { Loading Loading @@ -308,6 +309,7 @@ static const struct { {adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)}, {adreno_is_a615, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)}, {adreno_is_a640, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)}, {adreno_is_a680, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)}, }; static struct a6xx_protected_regs { Loading Loading @@ -541,12 +543,10 @@ static void a6xx_enable_64bit(struct adreno_device *adreno_dev) static inline unsigned int __get_rbbm_clock_cntl_on(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x8AA8AA82; else if (adreno_is_a640(adreno_dev)) return 0x8AA8AA82; else if (adreno_is_a630(adreno_dev)) return 0x8AA8AA02; else return 0x8AA8AA82; } static inline unsigned int Loading @@ -554,8 +554,6 @@ __get_gmu_ao_cgc_mode_cntl(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x00000222; else if (adreno_is_a640(adreno_dev)) return 0x00020202; else return 0x00020202; } Loading @@ -565,8 +563,6 @@ __get_gmu_ao_cgc_delay_cntl(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x00000111; else if (adreno_is_a640(adreno_dev)) return 0x00010111; else return 0x00010111; } Loading @@ -576,8 +572,6 @@ __get_gmu_ao_cgc_hyst_cntl(struct adreno_device *adreno_dev) { if (adreno_is_a615(adreno_dev)) return 0x00000555; else if (adreno_is_a640(adreno_dev)) return 0x00005555; else return 0x00005555; } Loading Loading @@ -758,6 +752,8 @@ static void a6xx_start(struct adreno_device *adreno_dev) /* Setting the primFifo thresholds values */ if (adreno_is_a640(adreno_dev)) kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x400 << 11)); else if (adreno_is_a680(adreno_dev)) kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x800 << 11)); else kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x300 << 11)); Loading
drivers/gpu/msm/adreno_a6xx_gmu.c +7 −6 Original line number Diff line number Diff line Loading @@ -551,7 +551,7 @@ static int a6xx_gmu_oob_set(struct adreno_device *adreno_dev, if (!gmu_core_isenabled(device)) return 0; if (adreno_is_a640(adreno_dev)) { if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev)) { set = BIT(30 - req * 2); check = BIT(31 - req); Loading Loading @@ -604,7 +604,7 @@ static inline void a6xx_gmu_oob_clear(struct adreno_device *adreno_dev, if (!gmu_core_isenabled(device)) return; if (adreno_is_a640(adreno_dev)) { if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev)) { clear = BIT(31 - req * 2); if (req >= 6) { dev_err(&gmu->pdev->dev, Loading @@ -626,11 +626,12 @@ static int a6xx_gmu_hfi_start_msg(struct adreno_device *adreno_dev) struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct hfi_start_cmd req; if (!adreno_is_a640(adreno_dev)) if (adreno_is_a640(adreno_dev) || adreno_is_a680(adreno_dev)) return hfi_send_req(KGSL_GMU_DEVICE(device), H2F_MSG_START, &req); return 0; /* Send hfi start msg */ return hfi_send_req(KGSL_GMU_DEVICE(device), H2F_MSG_START, &req); } #define FREQ_VOTE(idx, ack) (((idx) & 0xFF) | (((ack) & 0xF) << 28)) Loading
drivers/gpu/msm/kgsl_hfi.c +6 −9 Original line number Diff line number Diff line Loading @@ -610,7 +610,7 @@ int hfi_start(struct kgsl_device *device, if (test_bit(GMU_HFI_ON, &gmu->flags)) return 0; if (!adreno_is_a640(adreno_dev)) { if (!adreno_is_a640(adreno_dev) && !adreno_is_a680(adreno_dev)) { result = hfi_send_gmu_init(gmu, boot_state); if (result) return result; Loading @@ -629,10 +629,12 @@ int hfi_start(struct kgsl_device *device, return result; /* * Send H2F_MSG_CORE_FW_START and features for A640 devices, * otherwise send H2F_MSG_TEST if quirk is enabled. * If quirk is enabled send H2F_MSG_TEST and tell the GMU * we are sending no more HFIs until the next boot otherwise * send H2F_MSG_CORE_FW_START and features for A640 devices */ if (adreno_is_a640(adreno_dev)) { if (HFI_VER_MAJOR(&gmu->hfi) >= 2) { result = hfi_send_feature_ctrls(gmu); if (result) return result; Loading @@ -641,17 +643,12 @@ int hfi_start(struct kgsl_device *device, if (result) return result; } else { /* * Tell the GMU we are sending no more HFIs * until the next boot */ if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_HFI_USE_REG)) { result = hfi_send_test(gmu); if (result) return result; } } set_bit(GMU_HFI_ON, &gmu->flags); return 0; } Loading