Loading drivers/clk/qcom/clk-debug.c +8 −4 Original line number Diff line number Diff line Loading @@ -209,17 +209,19 @@ static void enable_debug_clks(struct clk_debug_mux *meas, u8 index) { int dbg_cc = meas->parent[index].dbg_cc; meas->en_mask = meas->en_mask ? meas->en_mask : CBCR_ENA; if (dbg_cc != GCC) { /* Not all recursive muxes have a DEBUG clock. */ if (meas->parent[index].cbcr_offset != U32_MAX) regmap_update_bits(meas->regmap[dbg_cc], meas->parent[index].cbcr_offset, CBCR_ENA, CBCR_ENA); meas->en_mask, meas->en_mask); } /* Turn on the GCC_DEBUG_CBCR */ regmap_update_bits(meas->regmap[GCC], meas->cbcr_offset, CBCR_ENA, CBCR_ENA); meas->en_mask, meas->en_mask); } Loading @@ -227,15 +229,17 @@ static void disable_debug_clks(struct clk_debug_mux *meas, u8 index) { int dbg_cc = meas->parent[index].dbg_cc; meas->en_mask = meas->en_mask ? meas->en_mask : CBCR_ENA; /* Turn off the GCC_DEBUG_CBCR */ regmap_update_bits(meas->regmap[GCC], meas->cbcr_offset, CBCR_ENA, 0); meas->en_mask, 0); if (dbg_cc != GCC) { if (meas->parent[index].cbcr_offset != U32_MAX) regmap_update_bits(meas->regmap[dbg_cc], meas->parent[index].cbcr_offset, CBCR_ENA, 0); meas->en_mask, 0); } } Loading drivers/clk/qcom/clk-debug.h +4 −1 Original line number Diff line number Diff line /* * Copyright (c) 2017, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -98,6 +98,8 @@ struct clk_src { * @num_parents: number of parents * @regmap: regmaps of debug mux * @priv: private measure_clk_data to be used by debug mux * @en_mask: indicates the enable bit mask at global clock * controller debug mux. * @debug_offset: debug mux offset. * @post_div_offset: register with post-divider settings for the debug mux. * @cbcr_offset: branch register to turn on debug mux. Loading @@ -116,6 +118,7 @@ struct clk_debug_mux { int num_parents; struct regmap **regmap; void *priv; u32 en_mask; u32 debug_offset; u32 post_div_offset; u32 cbcr_offset; Loading Loading
drivers/clk/qcom/clk-debug.c +8 −4 Original line number Diff line number Diff line Loading @@ -209,17 +209,19 @@ static void enable_debug_clks(struct clk_debug_mux *meas, u8 index) { int dbg_cc = meas->parent[index].dbg_cc; meas->en_mask = meas->en_mask ? meas->en_mask : CBCR_ENA; if (dbg_cc != GCC) { /* Not all recursive muxes have a DEBUG clock. */ if (meas->parent[index].cbcr_offset != U32_MAX) regmap_update_bits(meas->regmap[dbg_cc], meas->parent[index].cbcr_offset, CBCR_ENA, CBCR_ENA); meas->en_mask, meas->en_mask); } /* Turn on the GCC_DEBUG_CBCR */ regmap_update_bits(meas->regmap[GCC], meas->cbcr_offset, CBCR_ENA, CBCR_ENA); meas->en_mask, meas->en_mask); } Loading @@ -227,15 +229,17 @@ static void disable_debug_clks(struct clk_debug_mux *meas, u8 index) { int dbg_cc = meas->parent[index].dbg_cc; meas->en_mask = meas->en_mask ? meas->en_mask : CBCR_ENA; /* Turn off the GCC_DEBUG_CBCR */ regmap_update_bits(meas->regmap[GCC], meas->cbcr_offset, CBCR_ENA, 0); meas->en_mask, 0); if (dbg_cc != GCC) { if (meas->parent[index].cbcr_offset != U32_MAX) regmap_update_bits(meas->regmap[dbg_cc], meas->parent[index].cbcr_offset, CBCR_ENA, 0); meas->en_mask, 0); } } Loading
drivers/clk/qcom/clk-debug.h +4 −1 Original line number Diff line number Diff line /* * Copyright (c) 2017, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -98,6 +98,8 @@ struct clk_src { * @num_parents: number of parents * @regmap: regmaps of debug mux * @priv: private measure_clk_data to be used by debug mux * @en_mask: indicates the enable bit mask at global clock * controller debug mux. * @debug_offset: debug mux offset. * @post_div_offset: register with post-divider settings for the debug mux. * @cbcr_offset: branch register to turn on debug mux. Loading @@ -116,6 +118,7 @@ struct clk_debug_mux { int num_parents; struct regmap **regmap; void *priv; u32 en_mask; u32 debug_offset; u32 post_div_offset; u32 cbcr_offset; Loading