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Commit c01848c6 authored by Yaniv Gardi's avatar Yaniv Gardi Committed by Martin K. Petersen
Browse files

scsi: ufs: add support for UFS HCI 2.1 



The UFS HCI v2.1 includes a few additional registers. This change
updates the HCI register, the UFS version register content and the
Interrupt Status register.

Signed-off-by: default avatarYaniv Gardi <ygardi@codeaurora.org>
Signed-off-by: default avatarSubhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 70439e93

drivers/scsi/ufs/ufshcd.c

+25 −4
Original line number Diff line number Diff line
@@ -288,10 +288,24 @@ int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, 
 */

static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)

{

	if (hba->ufs_version == UFSHCI_VERSION_10)

		return INTERRUPT_MASK_ALL_VER_10;

	else

		return INTERRUPT_MASK_ALL_VER_11;

	u32 intr_mask = 0;



	switch (hba->ufs_version) {

	case UFSHCI_VERSION_10:

		intr_mask = INTERRUPT_MASK_ALL_VER_10;

		break;

	/* allow fall through */

	case UFSHCI_VERSION_11:

	case UFSHCI_VERSION_20:

		intr_mask = INTERRUPT_MASK_ALL_VER_11;

		break;

	/* allow fall through */

	case UFSHCI_VERSION_21:

	default:

		intr_mask = INTERRUPT_MASK_ALL_VER_21;

	}



	return intr_mask;

}



/**
@@ -6667,6 +6681,13 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) 
	/* Get UFS version supported by the controller */

	hba->ufs_version = ufshcd_get_ufs_version(hba);



	if ((hba->ufs_version != UFSHCI_VERSION_10) &&

	    (hba->ufs_version != UFSHCI_VERSION_11) &&

	    (hba->ufs_version != UFSHCI_VERSION_20) &&

	    (hba->ufs_version != UFSHCI_VERSION_21))

		dev_err(hba->dev, "invalid UFS version 0x%x\n",

			hba->ufs_version);



	/* Get Interrupt bit mask per version */

	hba->intr_mask = ufshcd_get_intr_mask(hba);

drivers/scsi/ufs/ufshci.h

+7 −0
Original line number Diff line number Diff line
@@ -72,6 +72,10 @@ enum { 
	REG_UIC_COMMAND_ARG_1			= 0x94,

	REG_UIC_COMMAND_ARG_2			= 0x98,

	REG_UIC_COMMAND_ARG_3			= 0x9C,

	REG_UFS_CCAP				= 0x100,

	REG_UFS_CRYPTOCAP			= 0x104,



	UFSHCI_CRYPTO_REG_SPACE_SIZE		= 0x400,

};



/* Controller capability masks */
@@ -275,6 +279,9 @@ enum { 


	/* Interrupt disable mask for UFSHCI v1.1 */

	INTERRUPT_MASK_ALL_VER_11	= 0x31FFF,



	/* Interrupt disable mask for UFSHCI v2.1 */

	INTERRUPT_MASK_ALL_VER_21	= 0x71FFF,

};



/*