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Commit bd6c5cab authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/ce: namespace + nvidia gpu names (no binary change) 



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 912a29c3

drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h

+7 −8
Original line number Diff line number Diff line
@@ -2,13 +2,12 @@ 
#define __NVKM_CE_H__

#include <core/engine.h>



void nva3_ce_intr(struct nouveau_subdev *);



extern struct nouveau_oclass nva3_ce_oclass;

extern struct nouveau_oclass nvc0_ce0_oclass;

extern struct nouveau_oclass nvc0_ce1_oclass;

extern struct nouveau_oclass nve0_ce0_oclass;

extern struct nouveau_oclass nve0_ce1_oclass;

extern struct nouveau_oclass nve0_ce2_oclass;

void gt215_ce_intr(struct nvkm_subdev *);



extern struct nvkm_oclass gt215_ce_oclass;

extern struct nvkm_oclass gf100_ce0_oclass;

extern struct nvkm_oclass gf100_ce1_oclass;

extern struct nvkm_oclass gk104_ce0_oclass;

extern struct nvkm_oclass gk104_ce1_oclass;

extern struct nvkm_oclass gk104_ce2_oclass;

#endif

drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild

+3 −3
Original line number Diff line number Diff line 
nvkm-y += nvkm/engine/ce/nva3.o

nvkm-y += nvkm/engine/ce/nvc0.o

nvkm-y += nvkm/engine/ce/nve0.o
 
nvkm-y += nvkm/engine/ce/gt215.o

nvkm-y += nvkm/engine/ce/gf100.o

nvkm-y += nvkm/engine/ce/gk104.o

drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc

+13 −20
Original line number Diff line number Diff line 
/* fuc microcode for copy engine on nva3- chipsets

/* fuc microcode for copy engine on gt215- chipsets

 *

 * Copyright 2011 Red Hat Inc.

 *
@@ -23,21 +23,14 @@ 
 * Authors: Ben Skeggs

 */



/* To build for nva3:nvc0

 *    m4 -DNVA3 nva3_copy.fuc | envyas -a -w -m fuc -V nva3 -o nva3_copy.fuc.h

 *

 * To build for nvc0-

 *    m4 -DNVC0 nva3_copy.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_copy.fuc.h

 */



#ifdef NVA3

.section #nva3_pce_data

#ifdef GT215

.section #gt215_pce_data

#else

.section #nvc0_pce_data

.section #gf100_pce_data

#endif



ctx_object:                   .b32 0

#ifdef NVA3

#ifdef GT215

ctx_dma:

ctx_dma_query:                .b32 0

ctx_dma_src:                  .b32 0
@@ -86,7 +79,7 @@ dispatch_table: 
// mthd 0x0140, PM_TRIGGER

.b16 0x050 1

.b32 0x00010000 + #cmd_pm_trigger    ~0xffffffff

#ifdef NVA3

#ifdef GT215

// mthd 0x0180-0x018c, DMA_

.b16 0x060 #ctx_dma_count

dispatch_dma:
@@ -134,10 +127,10 @@ dispatch_dma: 
.b32 #ctx_query_counter              ~0xffffffff

.b16 0x800 0



#ifdef NVA3

.section #nva3_pce_code

#ifdef GT215

.section #gt215_pce_code

#else

.section #nvc0_pce_code

.section #gf100_pce_code

#endif



main:
@@ -190,7 +183,7 @@ ih: 
swctx:

   mov $r4 0x7700

   mov $xtargets $r4

#ifdef NVA3

#ifdef GT215

   // target 7 hardcoded to ctx dma object

   mov $xdbase $r0

#else
@@ -271,7 +264,7 @@ chsw: 
   bra e #chsw_finish_load

      bset $flags $p1

      call #swctx

#ifdef NVA3

#ifdef GT215

      // load dma objects back into TARGET regs

      mov $r5 #ctx_dma

      mov $r6 #ctx_dma_count
@@ -396,7 +389,7 @@ cmd_pm_trigger: 
   iowr I[$r2] $r3

   ret



#ifdef NVA3

#ifdef GT215

// SET_DMA_* method handler

//

// Inputs:
@@ -547,7 +540,7 @@ cmd_exec_set_surface_tiled: 
   ld b32 $r7 D[$r5 + #ctx_src_tile_mode]

   extr $r9 $r7 8:11

   extr $r8 $r7 4:7

#ifdef NVA3

#ifdef GT215

   add b32 $r8 2

#else

   add b32 $r8 3

drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h→drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h

+2 −2
Original line number Diff line number Diff line 
uint32_t nvc0_pce_data[] = {

uint32_t gf100_pce_data[] = {

/* 0x0000: ctx_object */

	0x00000000,

/* 0x0004: ctx_query_address_high */
@@ -171,7 +171,7 @@ uint32_t nvc0_pce_data[] = { 
	0x00000800,

};



uint32_t nvc0_pce_code[] = {

uint32_t gf100_pce_code[] = {

/* 0x0000: main */

	0x04fe04bd,

	0x3517f000,