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Commit bc368222 authored by David Collins's avatar David Collins
Browse files

ARM: dts: msm: add PM855, PM855L, and PMK8002 PMIC devices for sdmshrike 



Include existing PM855 and PM855L device tree files for SDMSHRIKE
boards.  Also add PMIC devices for the second PM855 chip as well
as PMK8002.

Change-Id: I1f4bbf499e841a439c82c287340379bacad4bac3
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent 6efe6308

arch/arm64/boot/dts/qcom/sdmshrike-cdp.dtsi

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@@ -10,6 +10,8 @@ 
 * GNU General Public License for more details.

 */



#include "sdmshrike-pmic-overlay.dtsi"



&qupv3_se12_2uart {

	status = "ok";

};

arch/arm64/boot/dts/qcom/sdmshrike-mtp.dtsi

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@@ -10,6 +10,8 @@ 
 * GNU General Public License for more details.

 */



#include "sdmshrike-pmic-overlay.dtsi"



&qupv3_se12_2uart {

	status = "ok";

};

arch/arm64/boot/dts/qcom/sdmshrike-pmic-overlay.dtsi

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+88 −0
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/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include "pm855.dtsi"

#include "pm855l.dtsi"



pm855_1_gpios: &pm855_gpios {

	interrupts = <0x0 0xc0 0 IRQ_TYPE_NONE>,

			<0x0 0xc2 0 IRQ_TYPE_NONE>,

			<0x0 0xc3 0 IRQ_TYPE_NONE>,

			<0x0 0xc5 0 IRQ_TYPE_NONE>,

			<0x0 0xc8 0 IRQ_TYPE_NONE>;

	interrupt-names = "pm855_1_gpio1", "pm855_1_gpio3",

			"pm855_1_gpio4", "pm855_1_gpio6",

			"pm855_1_gpio9";

	qcom,gpios-disallowed = <2 5 7 8 10>;

};



/* PM855_2: */

&spmi_bus {

	qcom,pm855@8 {

		compatible = "qcom,spmi-pmic";

		reg = <0x8 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <1>;



		pm855_2_gpios: pinctrl@c000 {

			compatible = "qcom,spmi-gpio";

			reg = <0xc000 0xa00>;

			interrupts = <0x8 0xc0 0 IRQ_TYPE_NONE>,

					<0x8 0xc2 0 IRQ_TYPE_NONE>,

					<0x8 0xc3 0 IRQ_TYPE_NONE>,

					<0x8 0xc5 0 IRQ_TYPE_NONE>,

					<0x8 0xc8 0 IRQ_TYPE_NONE>,

					<0x8 0xc9 0 IRQ_TYPE_NONE>;

			interrupt-names = "pm855_2_gpio1", "pm855_2_gpio3",

					"pm855_2_gpio4", "pm855_2_gpio6",

					"pm855_2_gpio9", "pm855_2_gpio10";

			gpio-controller;

			#gpio-cells = <2>;

			qcom,gpios-disallowed = <2 5 7 8>;

		};

	};



	qcom,pm855@9 {

		compatible ="qcom,spmi-pmic";

		reg = <0x9 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <1>;

	};

};



/* PMK8002: */

&spmi_bus {

	qcom,pm855@6 {

		compatible = "qcom,spmi-pmic";

		reg = <0x6 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <1>;



		pmk8002_clkdiv: clock-controller@5b00 {

			compatible = "qcom,spmi-clkdiv";

			reg = <0x5b00 0x100>;

			#clock-cells = <1>;

			qcom,num-clkdivs = <1>;

			clock-output-names = "pmk8002_div_clk1";

			clocks = <&clock_rpmh RPMH_CXO_CLK>;

			clock-names = "xo";

		};

	};



	qcom,pm855@7 {

		compatible ="qcom,spmi-pmic";

		reg = <0x7 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <1>;

	};

};

arch/arm64/boot/dts/qcom/sdmshrike-rumi.dtsi

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 * GNU General Public License for more details.

 */



#include "sdmshrike-pmic-overlay.dtsi"



&soc {

	usb_emu_phy: usb_emu_phy@a720000 {

		compatible = "qcom,usb-emu-phy";

arch/arm64/boot/dts/qcom/sdmshrike.dtsi

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@@ -571,6 +571,9 @@ 
		cell-index = <0>;

	};



	thermal_zones: thermal-zones {

	};



	cmd_db: qcom,cmd-db@c3f000c {

		compatible = "qcom,cmd-db";

		reg = <0xc3f000c 8>;