Commit bbe57a6c authored Dec 14, 2017 by Bjorn Andersson Committed by Chris Lew Feb 21, 2018

rpmsg: glink: smem: Ensure ordering during tx



Ensure the ordering of the fifo write and the update of the write index,
so that the index is not updated before the data has landed in the fifo.

Change-Id: I90061b0f6d81105b47f45274d69f00d846d2a1ce
Acked-By: Chris Lew <clew@codeaurora.org>
Reported-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Patch-mainline: linux-arm-msm @ 14/12/2017 12:15
Signed-off-by: Chris Lew <clew@codeaurora.org>

parent 47628d6c

drivers/rpmsg/qcom_glink_smem.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -183,6 +183,9 @@ static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
		if (head >= pipe->native.length)
		head -= pipe->native.length;

		/* Ensure ordering of fifo and head update */
		wmb();

		*pipe->head = cpu_to_le32(head);
		}