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Commit bb11cff3 authored by Qais Yousef's avatar Qais Yousef Committed by Thomas Gleixner
Browse files

MIPS: Make smp CMP, CPS and MT use the new generic IPI functions



This commit does several things to avoid breaking bisectability.

	1- Remove IPI init code from irqchip/mips-gic
	2- Implement the new irqchip->send_ipi() in irqchip/mips-gic
	3- Select GENERIC_IRQ_IPI Kconfig symbol for MIPS_GIC
	4- Change MIPS SMP to use the generic IPI implementation

Only the SMP variants that use GIC were converted as it's the only irqchip that
will have the support for generic IPI for now.

Signed-off-by: default avatarQais Yousef <qais.yousef@imgtec.com>
Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
Cc: <jason@lakedaemon.net>
Cc: <marc.zyngier@arm.com>
Cc: <jiang.liu@linux.intel.com>
Cc: <linux-mips@linux-mips.org>
Cc: <lisa.parratt@imgtec.com>
Cc: Qais Yousef <qsyousef@gmail.com>
Link: http://lkml.kernel.org/r/1449580830-23652-18-git-send-email-qais.yousef@imgtec.com


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent fbde2d7d
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+3 −2
Original line number Original line Diff line number Diff line
@@ -44,8 +44,9 @@ static inline void plat_smp_setup(void)
	mp_ops->smp_setup();
	mp_ops->smp_setup();
}
}


extern void gic_send_ipi_single(int cpu, unsigned int action);
extern void mips_smp_send_ipi_single(int cpu, unsigned int action);
extern void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action);
extern void mips_smp_send_ipi_mask(const struct cpumask *mask,
				      unsigned int action);


#else /* !CONFIG_SMP */
#else /* !CONFIG_SMP */


+2 −2
Original line number Original line Diff line number Diff line
@@ -149,8 +149,8 @@ void __init cmp_prepare_cpus(unsigned int max_cpus)
}
}


struct plat_smp_ops cmp_smp_ops = {
struct plat_smp_ops cmp_smp_ops = {
	.send_ipi_single	= gic_send_ipi_single,
	.send_ipi_single	= mips_smp_send_ipi_single,
	.send_ipi_mask		= gic_send_ipi_mask,
	.send_ipi_mask		= mips_smp_send_ipi_mask,
	.init_secondary		= cmp_init_secondary,
	.init_secondary		= cmp_init_secondary,
	.smp_finish		= cmp_smp_finish,
	.smp_finish		= cmp_smp_finish,
	.boot_secondary		= cmp_boot_secondary,
	.boot_secondary		= cmp_boot_secondary,
+2 −2
Original line number Original line Diff line number Diff line
@@ -472,8 +472,8 @@ static struct plat_smp_ops cps_smp_ops = {
	.boot_secondary		= cps_boot_secondary,
	.boot_secondary		= cps_boot_secondary,
	.init_secondary		= cps_init_secondary,
	.init_secondary		= cps_init_secondary,
	.smp_finish		= cps_smp_finish,
	.smp_finish		= cps_smp_finish,
	.send_ipi_single	= gic_send_ipi_single,
	.send_ipi_single	= mips_smp_send_ipi_single,
	.send_ipi_mask		= gic_send_ipi_mask,
	.send_ipi_mask		= mips_smp_send_ipi_mask,
#ifdef CONFIG_HOTPLUG_CPU
#ifdef CONFIG_HOTPLUG_CPU
	.cpu_disable		= cps_cpu_disable,
	.cpu_disable		= cps_cpu_disable,
	.cpu_die		= cps_cpu_die,
	.cpu_die		= cps_cpu_die,
+1 −1
Original line number Original line Diff line number Diff line
@@ -121,7 +121,7 @@ static void vsmp_send_ipi_single(int cpu, unsigned int action)


#ifdef CONFIG_MIPS_GIC
#ifdef CONFIG_MIPS_GIC
	if (gic_present) {
	if (gic_present) {
		gic_send_ipi_single(cpu, action);
		mips_smp_send_ipi_single(cpu, action);
		return;
		return;
	}
	}
#endif
#endif
+1 −0
Original line number Original line Diff line number Diff line
@@ -209,6 +209,7 @@ config KEYSTONE_IRQ


config MIPS_GIC
config MIPS_GIC
	bool
	bool
	select GENERIC_IRQ_IPI
	select IRQ_DOMAIN_HIERARCHY
	select IRQ_DOMAIN_HIERARCHY
	select MIPS_CM
	select MIPS_CM


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