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Commit ba6f7011 authored by Masahiro Yamada's avatar Masahiro Yamada
Browse files

arm64: dts: uniphier: add input-delay properties to Cadence eMMC node 



Since commit a89c472d ("mmc: sdhci-cadence: Update PHY delay
configuration"), PHY parameters must be specified by DT.

The hard-coded settings have been converted as follows:
- SDHCI_CDNS_PHY_DLY_SD_DEFAULT -> cdns,phy-input-delay-legacy
- SDHCI_CDNS_PHY_DLY_EMMC_SDR   -> cdns,phy-input-delay-mmc-highspeed
- SDHCI_CDNS_PHY_DLY_EMMC_DDR   -> cdns,phy-input-delay-mmc-ddr

The following have not been moved:
- SDHCI_CDNS_PHY_DLY_SD_HS
   this is unneeded in the eMMC configuration
- SDHCI_CDNS_PHY_DLY_EMMC_LEGACY
   this is never enabled by the driver as it is covered by
   SDHCI_CDNS_PHY_DLY_SD_DEFAULT

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 2ea659a9

arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -310,6 +310,9 @@ 
			bus-width = <8>;

			mmc-ddr-1_8v;

			mmc-hs200-1_8v;

			cdns,phy-input-delay-legacy = <4>;

			cdns,phy-input-delay-mmc-highspeed = <2>;

			cdns,phy-input-delay-mmc-ddr = <3>;

		};



		usb0: usb@5a800100 {

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -384,6 +384,9 @@ 
			bus-width = <8>;

			mmc-ddr-1_8v;

			mmc-hs200-1_8v;

			cdns,phy-input-delay-legacy = <4>;

			cdns,phy-input-delay-mmc-highspeed = <2>;

			cdns,phy-input-delay-mmc-ddr = <3>;

		};



		soc-glue@5f800000 {