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Commit b8c63786 authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Mark Brown
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ASoC: rsnd: use regmap_mmio instead of original regmap bus 



Current rsnd driver is using regmap and regmap_field.
It used original regmap bus which is
single regmap instance for multi register mapping.
This patch modifies it to use regmap_mmio bus,
and tidyuped probe method

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent d62a3dcd

sound/soc/sh/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ config SND_SOC_SH4_SIU 
config SND_SOC_RCAR

	tristate "R-Car series SRU/SCU/SSIU/SSI support"

	select SND_SIMPLE_CARD

	select REGMAP

	select REGMAP_MMIO

	help

	  This option enables R-Car SUR/SCU/SSIU/SSI sound support

sound/soc/sh/rcar/gen.c

+188 −251
Original line number Diff line number Diff line
@@ -15,63 +15,35 @@ struct rsnd_gen { 


	struct rsnd_gen_ops *ops;



	struct regmap *regmap;

	struct regmap *regmap[RSND_BASE_MAX];

	struct regmap_field *regs[RSND_REG_MAX];

};



#define rsnd_priv_to_gen(p)	((struct rsnd_gen *)(p)->gen)



#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size)	\

	[id] = {							\

		.reg = (unsigned int)gen->base[reg_id] + offset,	\

		.lsb = 0,						\

		.msb = 31,						\

		.id_size = _id_size,					\

struct rsnd_regmap_field_conf {

	int idx;

	unsigned int reg_offset;

	unsigned int id_offset;

};



#define RSND_REG_SET(id, offset, _id_offset)	\

{						\

	.idx = id,				\

	.reg_offset = offset,			\

	.id_offset = _id_offset,		\

}

/* single address mapping */

#define RSND_GEN_S_REG(id, offset)	\

	RSND_REG_SET(RSND_REG_##id, offset, 0)



/* multi address mapping */

#define RSND_GEN_M_REG(id, offset, _id_offset)	\

	RSND_REG_SET(RSND_REG_##id, offset, _id_offset)



/*

 *		basic function

 */

static int rsnd_regmap_write32(void *context, const void *_data, size_t count)

{

	struct rsnd_priv *priv = context;

	struct device *dev = rsnd_priv_to_dev(priv);

	u32 *data = (u32 *)_data;

	u32 val = data[1];

	void __iomem *reg = (void *)data[0];



	iowrite32(val, reg);



	dev_dbg(dev, "w %p : %08x\n", reg, val);



	return 0;

}



static int rsnd_regmap_read32(void *context,

			      const void *_data, size_t reg_size,

			      void *_val, size_t val_size)

{

	struct rsnd_priv *priv = context;

	struct device *dev = rsnd_priv_to_dev(priv);

	u32 *data = (u32 *)_data;

	u32 *val = (u32 *)_val;

	void __iomem *reg = (void *)data[0];



	*val = ioread32(reg);



	dev_dbg(dev, "r %p : %08x\n", reg, *val);



	return 0;

}



static struct regmap_bus rsnd_regmap_bus = {

	.write				= rsnd_regmap_write32,

	.read				= rsnd_regmap_read32,

	.reg_format_endian_default	= REGMAP_ENDIAN_NATIVE,

	.val_format_endian_default	= REGMAP_ENDIAN_NATIVE,

};



static int rsnd_is_accessible_reg(struct rsnd_priv *priv,

				  struct rsnd_gen *gen, enum rsnd_reg reg)

{
@@ -88,6 +60,7 @@ static int rsnd_is_accessible_reg(struct rsnd_priv *priv, 
u32 rsnd_read(struct rsnd_priv *priv,

	      struct rsnd_mod *mod, enum rsnd_reg reg)

{

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	u32 val;
@@ -96,6 +69,8 @@ u32 rsnd_read(struct rsnd_priv *priv, 


	regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);



	dev_dbg(dev, "r %s - 0x%04d : %08x\n", rsnd_mod_name(mod), reg, val);



	return val;

}
@@ -103,12 +78,15 @@ void rsnd_write(struct rsnd_priv *priv, 
		struct rsnd_mod *mod,

		enum rsnd_reg reg, u32 data)

{

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);



	if (!rsnd_is_accessible_reg(priv, gen, reg))

		return;



	regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);



	dev_dbg(dev, "w %s - 0x%04d : %08x\n", rsnd_mod_name(mod), reg, data);

}



void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
@@ -123,33 +101,58 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, 
				  mask, data);

}



static int rsnd_gen_regmap_init(struct rsnd_priv *priv,

				struct rsnd_gen  *gen,

				struct reg_field *regf)

#define rsnd_gen_regmap_init(priv, id_size, reg_id, conf)		\

	_rsnd_gen_regmap_init(priv, id_size, reg_id, conf, ARRAY_SIZE(conf))

static int _rsnd_gen_regmap_init(struct rsnd_priv *priv,

				 int id_size,

				 int reg_id,

				 struct rsnd_regmap_field_conf *conf,

				 int conf_size)

{

	int i;

	struct platform_device *pdev = rsnd_priv_to_pdev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	struct device *dev = rsnd_priv_to_dev(priv);

	struct resource *res;

	struct regmap_config regc;

	struct regmap_field *regs;

	struct regmap *regmap;

	struct reg_field regf;

	void __iomem *base;

	int i;



	memset(&regc, 0, sizeof(regc));

	regc.reg_bits = 32;

	regc.val_bits = 32;

	regc.reg_stride = 4;



	gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, &regc);

	if (IS_ERR(gen->regmap)) {

		dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap));

		return PTR_ERR(gen->regmap);

	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, reg_id);

	if (!res)

		return -ENODEV;



	base = devm_ioremap_resource(dev, res);

	if (IS_ERR(base))

		return PTR_ERR(base);



	regmap = devm_regmap_init_mmio(dev, base, &regc);

	if (IS_ERR(regmap))

		return PTR_ERR(regmap);



	gen->base[reg_id] = base;

	gen->regmap[reg_id] = regmap;



	for (i = 0; i < RSND_REG_MAX; i++) {

		gen->regs[i] = NULL;

		if (!regf[i].reg)

			continue;

	for (i = 0; i < conf_size; i++) {



		gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]);

		if (IS_ERR(gen->regs[i]))

			return PTR_ERR(gen->regs[i]);

		regf.reg	= conf[i].reg_offset;

		regf.id_offset	= conf[i].id_offset;

		regf.lsb	= 0;

		regf.msb	= 31;

		regf.id_size	= id_size;



		regs = devm_regmap_field_alloc(dev, regmap, regf);

		if (IS_ERR(regs))

			return PTR_ERR(regs);



		gen->regs[conf[i].idx] = regs;

	}



	return 0;
@@ -271,119 +274,85 @@ dma_addr_t rsnd_gen_dma_addr(struct rsnd_priv *priv, 
/*

 *		Gen2

 */



/* single address mapping */

#define RSND_GEN2_S_REG(gen, reg, id, offset)				\

	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, 0, 10)



/* multi address mapping */

#define RSND_GEN2_M_REG(gen, reg, id, offset, _id_offset)		\

	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, _id_offset, 10)



static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)

{

	struct reg_field regf[RSND_REG_MAX] = {

		RSND_GEN2_S_REG(gen, SSIU,	SSI_MODE0,	0x800),

		RSND_GEN2_S_REG(gen, SSIU,	SSI_MODE1,	0x804),

		/* FIXME: it needs SSI_MODE2/3 in the future */

		RSND_GEN2_M_REG(gen, SSIU,	SSI_BUSIF_MODE,	0x0,	0x80),

		RSND_GEN2_M_REG(gen, SSIU,	SSI_BUSIF_ADINR,0x4,	0x80),

		RSND_GEN2_M_REG(gen, SSIU,	SSI_CTRL,	0x10,	0x80),

		RSND_GEN2_M_REG(gen, SSIU,	INT_ENABLE,	0x18,	0x80),



		RSND_GEN2_M_REG(gen, SCU,	SRC_BUSIF_MODE,	0x0,	0x20),

		RSND_GEN2_M_REG(gen, SCU,	SRC_ROUTE_MODE0,0xc,	0x20),

		RSND_GEN2_M_REG(gen, SCU,	SRC_CTRL,	0x10,	0x20),

		RSND_GEN2_M_REG(gen, SCU,	CMD_ROUTE_SLCT,	0x18c,	0x20),

		RSND_GEN2_M_REG(gen, SCU,	CMD_CTRL,	0x190,	0x20),

		RSND_GEN2_M_REG(gen, SCU,	SRC_SWRSR,	0x200,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_SRCIR,	0x204,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_ADINR,	0x214,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_IFSCR,	0x21c,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_IFSVR,	0x220,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_SRCCR,	0x224,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_BSDSR,	0x22c,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	SRC_BSISR,	0x238,	0x40),

		RSND_GEN2_M_REG(gen, SCU,	DVC_SWRSR,	0xe00,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_DVUIR,	0xe04,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_ADINR,	0xe08,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_DVUCR,	0xe10,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_ZCMCR,	0xe14,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_VOL0R,	0xe28,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_VOL1R,	0xe2c,	0x100),

		RSND_GEN2_M_REG(gen, SCU,	DVC_DVUER,	0xe48,	0x100),



		RSND_GEN2_S_REG(gen, ADG,	BRRA,		0x00),

		RSND_GEN2_S_REG(gen, ADG,	BRRB,		0x04),

		RSND_GEN2_S_REG(gen, ADG,	SSICKR,		0x08),

		RSND_GEN2_S_REG(gen, ADG,	AUDIO_CLK_SEL0,	0x0c),

		RSND_GEN2_S_REG(gen, ADG,	AUDIO_CLK_SEL1,	0x10),

		RSND_GEN2_S_REG(gen, ADG,	AUDIO_CLK_SEL2,	0x14),

		RSND_GEN2_S_REG(gen, ADG,	DIV_EN,		0x30),

		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL0,	0x34),

		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL1,	0x38),

		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL2,	0x3c),

		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL3,	0x40),

		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL4,	0x44),

		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL0,	0x48),

		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL1,	0x4c),

		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL2,	0x50),

		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL3,	0x54),

		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL4,	0x58),

		RSND_GEN2_S_REG(gen, ADG,	CMDOUT_TIMSEL,	0x5c),



		RSND_GEN2_M_REG(gen, SSI,	SSICR,		0x00,	0x40),

		RSND_GEN2_M_REG(gen, SSI,	SSISR,		0x04,	0x40),

		RSND_GEN2_M_REG(gen, SSI,	SSITDR,		0x08,	0x40),

		RSND_GEN2_M_REG(gen, SSI,	SSIRDR,		0x0c,	0x40),

		RSND_GEN2_M_REG(gen, SSI,	SSIWSR,		0x20,	0x40),

	};



	return rsnd_gen_regmap_init(priv, gen, regf);

}



static int rsnd_gen2_probe(struct platform_device *pdev,

			   struct rsnd_priv *priv)

{

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	struct resource *scu_res;

	struct resource *adg_res;

	struct resource *ssiu_res;

	struct resource *ssi_res;

	int ret;



	/*

	 * map address

	 */

	scu_res  = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SCU);

	adg_res  = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_ADG);

	ssiu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSIU);

	ssi_res  = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSI);



	gen->base[RSND_GEN2_SCU]  = devm_ioremap_resource(dev, scu_res);

	gen->base[RSND_GEN2_ADG]  = devm_ioremap_resource(dev, adg_res);

	gen->base[RSND_GEN2_SSIU] = devm_ioremap_resource(dev, ssiu_res);

	gen->base[RSND_GEN2_SSI]  = devm_ioremap_resource(dev, ssi_res);

	if (IS_ERR(gen->base[RSND_GEN2_SCU])  ||

	    IS_ERR(gen->base[RSND_GEN2_ADG])  ||

	    IS_ERR(gen->base[RSND_GEN2_SSIU]) ||

	    IS_ERR(gen->base[RSND_GEN2_SSI]))

		return -ENODEV;



	ret = rsnd_gen2_regmap_init(priv, gen);

	if (ret < 0)

		return ret;



	dev_dbg(dev, "Gen2 device probed\n");

	dev_dbg(dev, "SCU  : %pap => %p\n", &scu_res->start,

		gen->base[RSND_GEN2_SCU]);

	dev_dbg(dev, "ADG  : %pap => %p\n", &adg_res->start,

		gen->base[RSND_GEN2_ADG]);

	dev_dbg(dev, "SSIU : %pap => %p\n", &ssiu_res->start,

		gen->base[RSND_GEN2_SSIU]);

	dev_dbg(dev, "SSI  : %pap => %p\n", &ssi_res->start,

		gen->base[RSND_GEN2_SSI]);

	struct rsnd_regmap_field_conf conf_ssiu[] = {

		RSND_GEN_S_REG(SSI_MODE0,	0x800),

		RSND_GEN_S_REG(SSI_MODE1,	0x804),

		/* FIXME: it needs SSI_MODE2/3 in the future */

		RSND_GEN_M_REG(SSI_BUSIF_MODE,	0x0,	0x80),

		RSND_GEN_M_REG(SSI_BUSIF_ADINR,	0x4,	0x80),

		RSND_GEN_M_REG(SSI_CTRL,	0x10,	0x80),

		RSND_GEN_M_REG(INT_ENABLE,	0x18,	0x80),

	};

	struct rsnd_regmap_field_conf conf_scu[] = {

		RSND_GEN_M_REG(SRC_BUSIF_MODE,	0x0,	0x20),

		RSND_GEN_M_REG(SRC_ROUTE_MODE0,	0xc,	0x20),

		RSND_GEN_M_REG(SRC_CTRL,	0x10,	0x20),

		RSND_GEN_M_REG(CMD_ROUTE_SLCT,	0x18c,	0x20),

		RSND_GEN_M_REG(CMD_CTRL,	0x190,	0x20),

		RSND_GEN_M_REG(SRC_SWRSR,	0x200,	0x40),

		RSND_GEN_M_REG(SRC_SRCIR,	0x204,	0x40),

		RSND_GEN_M_REG(SRC_ADINR,	0x214,	0x40),

		RSND_GEN_M_REG(SRC_IFSCR,	0x21c,	0x40),

		RSND_GEN_M_REG(SRC_IFSVR,	0x220,	0x40),

		RSND_GEN_M_REG(SRC_SRCCR,	0x224,	0x40),

		RSND_GEN_M_REG(SRC_BSDSR,	0x22c,	0x40),

		RSND_GEN_M_REG(SRC_BSISR,	0x238,	0x40),

		RSND_GEN_M_REG(DVC_SWRSR,	0xe00,	0x100),

		RSND_GEN_M_REG(DVC_DVUIR,	0xe04,	0x100),

		RSND_GEN_M_REG(DVC_ADINR,	0xe08,	0x100),

		RSND_GEN_M_REG(DVC_DVUCR,	0xe10,	0x100),

		RSND_GEN_M_REG(DVC_ZCMCR,	0xe14,	0x100),

		RSND_GEN_M_REG(DVC_VOL0R,	0xe28,	0x100),

		RSND_GEN_M_REG(DVC_VOL1R,	0xe2c,	0x100),

		RSND_GEN_M_REG(DVC_DVUER,	0xe48,	0x100),

	};

	struct rsnd_regmap_field_conf conf_adg[] = {

		RSND_GEN_S_REG(BRRA,		0x00),

		RSND_GEN_S_REG(BRRB,		0x04),

		RSND_GEN_S_REG(SSICKR,		0x08),

		RSND_GEN_S_REG(AUDIO_CLK_SEL0,	0x0c),

		RSND_GEN_S_REG(AUDIO_CLK_SEL1,	0x10),

		RSND_GEN_S_REG(AUDIO_CLK_SEL2,	0x14),

		RSND_GEN_S_REG(DIV_EN,		0x30),

		RSND_GEN_S_REG(SRCIN_TIMSEL0,	0x34),

		RSND_GEN_S_REG(SRCIN_TIMSEL1,	0x38),

		RSND_GEN_S_REG(SRCIN_TIMSEL2,	0x3c),

		RSND_GEN_S_REG(SRCIN_TIMSEL3,	0x40),

		RSND_GEN_S_REG(SRCIN_TIMSEL4,	0x44),

		RSND_GEN_S_REG(SRCOUT_TIMSEL0,	0x48),

		RSND_GEN_S_REG(SRCOUT_TIMSEL1,	0x4c),

		RSND_GEN_S_REG(SRCOUT_TIMSEL2,	0x50),

		RSND_GEN_S_REG(SRCOUT_TIMSEL3,	0x54),

		RSND_GEN_S_REG(SRCOUT_TIMSEL4,	0x58),

		RSND_GEN_S_REG(CMDOUT_TIMSEL,	0x5c),

	};

	struct rsnd_regmap_field_conf conf_ssi[] = {

		RSND_GEN_M_REG(SSICR,		0x00,	0x40),

		RSND_GEN_M_REG(SSISR,		0x04,	0x40),

		RSND_GEN_M_REG(SSITDR,		0x08,	0x40),

		RSND_GEN_M_REG(SSIRDR,		0x0c,	0x40),

		RSND_GEN_M_REG(SSIWSR,		0x20,	0x40),

	};

	int ret_ssiu;

	int ret_scu;

	int ret_adg;

	int ret_ssi;



	ret_ssiu = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SSIU, conf_ssiu);

	ret_scu  = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SCU,  conf_scu);

	ret_adg  = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_ADG,  conf_adg);

	ret_ssi  = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SSI,  conf_ssi);

	if (ret_ssiu < 0 ||

	    ret_scu  < 0 ||

	    ret_adg  < 0 ||

	    ret_ssi  < 0)

		return ret_ssiu | ret_scu | ret_adg | ret_ssi;



	dev_dbg(dev, "Gen2 is probed\n");



	return 0;

}
@@ -392,92 +361,60 @@ static int rsnd_gen2_probe(struct platform_device *pdev, 
 *		Gen1

 */



/* single address mapping */

#define RSND_GEN1_S_REG(gen, reg, id, offset)	\

	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9)



/* multi address mapping */

#define RSND_GEN1_M_REG(gen, reg, id, offset, _id_offset)	\

	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, _id_offset, 9)



static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)

{

	struct reg_field regf[RSND_REG_MAX] = {

		RSND_GEN1_S_REG(gen, SRU,	SRC_ROUTE_SEL,	0x00),

		RSND_GEN1_S_REG(gen, SRU,	SRC_TMG_SEL0,	0x08),

		RSND_GEN1_S_REG(gen, SRU,	SRC_TMG_SEL1,	0x0c),

		RSND_GEN1_S_REG(gen, SRU,	SRC_TMG_SEL2,	0x10),

		RSND_GEN1_S_REG(gen, SRU,	SRC_ROUTE_CTRL,	0xc0),

		RSND_GEN1_S_REG(gen, SRU,	SSI_MODE0,	0xD0),

		RSND_GEN1_S_REG(gen, SRU,	SSI_MODE1,	0xD4),

		RSND_GEN1_M_REG(gen, SRU,	SRC_BUSIF_MODE,	0x20,	0x4),

		RSND_GEN1_M_REG(gen, SRU,	SRC_ROUTE_MODE0,0x50,	0x8),

		RSND_GEN1_M_REG(gen, SRU,	SRC_SWRSR,	0x200,	0x40),

		RSND_GEN1_M_REG(gen, SRU,	SRC_SRCIR,	0x204,	0x40),

		RSND_GEN1_M_REG(gen, SRU,	SRC_ADINR,	0x214,	0x40),

		RSND_GEN1_M_REG(gen, SRU,	SRC_IFSCR,	0x21c,	0x40),

		RSND_GEN1_M_REG(gen, SRU,	SRC_IFSVR,	0x220,	0x40),

		RSND_GEN1_M_REG(gen, SRU,	SRC_SRCCR,	0x224,	0x40),

		RSND_GEN1_M_REG(gen, SRU,	SRC_MNFSR,	0x228,	0x40),



		RSND_GEN1_S_REG(gen, ADG,	BRRA,		0x00),

		RSND_GEN1_S_REG(gen, ADG,	BRRB,		0x04),

		RSND_GEN1_S_REG(gen, ADG,	SSICKR,		0x08),

		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL0,	0x0c),

		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL1,	0x10),

		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL3,	0x18),

		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL4,	0x1c),

		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL5,	0x20),



		RSND_GEN1_M_REG(gen, SSI,	SSICR,		0x00,	0x40),

		RSND_GEN1_M_REG(gen, SSI,	SSISR,		0x04,	0x40),

		RSND_GEN1_M_REG(gen, SSI,	SSITDR,		0x08,	0x40),

		RSND_GEN1_M_REG(gen, SSI,	SSIRDR,		0x0c,	0x40),

		RSND_GEN1_M_REG(gen, SSI,	SSIWSR,		0x20,	0x40),

	};



	return rsnd_gen_regmap_init(priv, gen, regf);

}



static int rsnd_gen1_probe(struct platform_device *pdev,

			   struct rsnd_priv *priv)

{

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	struct resource *sru_res;

	struct resource *adg_res;

	struct resource *ssi_res;

	int ret;



	/*

	 * map address

	 */

	sru_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);

	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);

	ssi_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI);



	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);

	gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);

	gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res);

	if (IS_ERR(gen->base[RSND_GEN1_SRU]) ||

	    IS_ERR(gen->base[RSND_GEN1_ADG]) ||

	    IS_ERR(gen->base[RSND_GEN1_SSI]))

		return -ENODEV;

	struct rsnd_regmap_field_conf conf_sru[] = {

		RSND_GEN_S_REG(SRC_ROUTE_SEL,	0x00),

		RSND_GEN_S_REG(SRC_TMG_SEL0,	0x08),

		RSND_GEN_S_REG(SRC_TMG_SEL1,	0x0c),

		RSND_GEN_S_REG(SRC_TMG_SEL2,	0x10),

		RSND_GEN_S_REG(SRC_ROUTE_CTRL,	0xc0),

		RSND_GEN_S_REG(SSI_MODE0,	0xD0),

		RSND_GEN_S_REG(SSI_MODE1,	0xD4),

		RSND_GEN_M_REG(SRC_BUSIF_MODE,	0x20,	0x4),

		RSND_GEN_M_REG(SRC_ROUTE_MODE0,	0x50,	0x8),

		RSND_GEN_M_REG(SRC_SWRSR,	0x200,	0x40),

		RSND_GEN_M_REG(SRC_SRCIR,	0x204,	0x40),

		RSND_GEN_M_REG(SRC_ADINR,	0x214,	0x40),

		RSND_GEN_M_REG(SRC_IFSCR,	0x21c,	0x40),

		RSND_GEN_M_REG(SRC_IFSVR,	0x220,	0x40),

		RSND_GEN_M_REG(SRC_SRCCR,	0x224,	0x40),

		RSND_GEN_M_REG(SRC_MNFSR,	0x228,	0x40),

	};

	struct rsnd_regmap_field_conf conf_adg[] = {

		RSND_GEN_S_REG(BRRA,		0x00),

		RSND_GEN_S_REG(BRRB,		0x04),

		RSND_GEN_S_REG(SSICKR,		0x08),

		RSND_GEN_S_REG(AUDIO_CLK_SEL0,	0x0c),

		RSND_GEN_S_REG(AUDIO_CLK_SEL1,	0x10),

		RSND_GEN_S_REG(AUDIO_CLK_SEL3,	0x18),

		RSND_GEN_S_REG(AUDIO_CLK_SEL4,	0x1c),

		RSND_GEN_S_REG(AUDIO_CLK_SEL5,	0x20),

	};

	struct rsnd_regmap_field_conf conf_ssi[] = {

		RSND_GEN_M_REG(SSICR,		0x00,	0x40),

		RSND_GEN_M_REG(SSISR,		0x04,	0x40),

		RSND_GEN_M_REG(SSITDR,		0x08,	0x40),

		RSND_GEN_M_REG(SSIRDR,		0x0c,	0x40),

		RSND_GEN_M_REG(SSIWSR,		0x20,	0x40),

	};

	int ret_sru;

	int ret_adg;

	int ret_ssi;



	ret = rsnd_gen1_regmap_init(priv, gen);

	if (ret < 0)

		return ret;

	ret_sru  = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_SRU,  conf_sru);

	ret_adg  = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_ADG,  conf_adg);

	ret_ssi  = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_SSI,  conf_ssi);

	if (ret_sru  < 0 ||

	    ret_adg  < 0 ||

	    ret_ssi  < 0)

		return ret_sru | ret_adg | ret_ssi;



	dev_dbg(dev, "Gen1 device probed\n");

	dev_dbg(dev, "SRU : %pap => %p\n",	&sru_res->start,

						gen->base[RSND_GEN1_SRU]);

	dev_dbg(dev, "ADG : %pap => %p\n",	&adg_res->start,

						gen->base[RSND_GEN1_ADG]);

	dev_dbg(dev, "SSI : %pap => %p\n",	&ssi_res->start,

						gen->base[RSND_GEN1_SSI]);

	dev_dbg(dev, "Gen1 is probed\n");



	return 0;



}



/*