Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b7cb1c50 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-fixes-3.10' of... 

Merge branch 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

Fixes some s/r problem with copy engines and ZCULL issues and playlist issues
* 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau: ensure channels are stopped before saving fences for suspend
  drm/nv50/fifo: prevent races between clients updating playlists
  drm/nvc0/fifo: prevent CHAN_TABLE_ERROR:CHANNEL_PENDING on fifo fini
  drm/nvc0/fifo: prevent races between clients updating playlists
  drm/nve0/fifo: prevent races between clients updating playlists
  drm/nve0/ltcg: poke the partition count into yet another register
  drm/nvc0/ltcg: fix handling of disabled partitions
  drm/nvc0/ce: disable ce1 on a number of chipsets
  drm/nouveau/bios: fix thinko in ZM_MASK_ADD opcode
  drm/nouveau: fix build with nv50->nvc0
parents e9ced8e0 81dff21b

drivers/gpu/drm/nouveau/core/engine/device/nvc0.c

+0 −2
Original line number Diff line number Diff line
@@ -138,7 +138,6 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nvc0_copy1_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nva3_disp_oclass;

		break;

	case 0xce:
@@ -225,7 +224,6 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nvc0_copy1_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nva3_disp_oclass;

		break;

	case 0xc8:

drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c

+2 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ nv50_fifo_playlist_update(struct nv50_fifo_priv *priv) 
	struct nouveau_gpuobj *cur;

	int i, p;



	mutex_lock(&nv_subdev(priv)->mutex);

	cur = priv->playlist[priv->cur_playlist];

	priv->cur_playlist = !priv->cur_playlist;
@@ -60,6 +61,7 @@ nv50_fifo_playlist_update(struct nv50_fifo_priv *priv) 
	nv_wr32(priv, 0x0032f4, cur->addr >> 12);

	nv_wr32(priv, 0x0032ec, p);

	nv_wr32(priv, 0x002500, 0x00000101);

	mutex_unlock(&nv_subdev(priv)->mutex);

}



static int

drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c

+10 −0
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ nvc0_fifo_playlist_update(struct nvc0_fifo_priv *priv) 
	struct nouveau_gpuobj *cur;

	int i, p;



	mutex_lock(&nv_subdev(priv)->mutex);

	cur = priv->playlist[priv->cur_playlist];

	priv->cur_playlist = !priv->cur_playlist;
@@ -87,6 +88,7 @@ nvc0_fifo_playlist_update(struct nvc0_fifo_priv *priv) 
	nv_wr32(priv, 0x002274, 0x01f00000 | (p >> 3));

	if (!nv_wait(priv, 0x00227c, 0x00100000, 0x00000000))

		nv_error(priv, "playlist update failed\n");

	mutex_unlock(&nv_subdev(priv)->mutex);

}



static int
@@ -248,9 +250,17 @@ nvc0_fifo_chan_fini(struct nouveau_object *object, bool suspend) 
	struct nvc0_fifo_priv *priv = (void *)object->engine;

	struct nvc0_fifo_chan *chan = (void *)object;

	u32 chid = chan->base.chid;

	u32 mask, engine;



	nv_mask(priv, 0x003004 + (chid * 8), 0x00000001, 0x00000000);

	nvc0_fifo_playlist_update(priv);

	mask = nv_rd32(priv, 0x0025a4);

	for (engine = 0; mask && engine < 16; engine++) {

		if (!(mask & (1 << engine)))

			continue;

		nv_mask(priv, 0x0025a8 + (engine * 4), 0x00000000, 0x00000000);

		mask &= ~(1 << engine);

	}

	nv_wr32(priv, 0x003000 + (chid * 8), 0x00000000);



	return nouveau_fifo_channel_fini(&chan->base, suspend);

drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c

+3 −0
Original line number Diff line number Diff line
@@ -94,11 +94,13 @@ nve0_fifo_playlist_update(struct nve0_fifo_priv *priv, u32 engine) 
	u32 match = (engine << 16) | 0x00000001;

	int i, p;



	mutex_lock(&nv_subdev(priv)->mutex);

	cur = engn->playlist[engn->cur_playlist];

	if (unlikely(cur == NULL)) {

		int ret = nouveau_gpuobj_new(nv_object(priv), NULL,

					     0x8000, 0x1000, 0, &cur);

		if (ret) {

			mutex_unlock(&nv_subdev(priv)->mutex);

			nv_error(priv, "playlist alloc failed\n");

			return;

		}
@@ -122,6 +124,7 @@ nve0_fifo_playlist_update(struct nve0_fifo_priv *priv, u32 engine) 
	nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3));

	if (!nv_wait(priv, 0x002284 + (engine * 4), 0x00100000, 0x00000000))

		nv_error(priv, "playlist %d update timeout\n", engine);

	mutex_unlock(&nv_subdev(priv)->mutex);

}



static int

drivers/gpu/drm/nouveau/core/subdev/bios/init.c

+2 −2
Original line number Diff line number Diff line
@@ -1940,8 +1940,8 @@ init_zm_mask_add(struct nvbios_init *init) 
	trace("ZM_MASK_ADD\tR[0x%06x] &= 0x%08x += 0x%08x\n", addr, mask, add);

	init->offset += 13;



	data  =  init_rd32(init, addr) & mask;

	data |= ((data + add) & ~mask);

	data =  init_rd32(init, addr);

	data = (data & mask) | ((data + add) & ~mask);

	init_wr32(init, addr, data);

}