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Commit b76bfeba authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915/bdw: Provide a gen8 version of SRM 



GEN8 now has a qword to code for 48bit addresses.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7ec55f46

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -267,6 +267,7 @@ 
 */

#define MI_LOAD_REGISTER_IMM(x)	MI_INSTR(0x22, 2*(x)-1)

#define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*(x)-1)

#define MI_STORE_REGISTER_MEM_GEN8(x) MI_INSTR(0x24, 3*(x)-1)

#define   MI_SRM_LRM_GLOBAL_GTT		(1<<22)

#define MI_FLUSH_DW		MI_INSTR(0x26, 1) /* for GEN6 */

#define   MI_FLUSH_DW_STORE_INDEX	(1<<21)