Merge commit 'refs/changes/02/2511202/2' of ssh://git.quicinc.com:29418/kernel/msm-4.14 (b66e4d36) · Commits · e / devices / android_kernel_oneplus_sm8150

Makefile

+3 −3

Original line number	Diff line number	Diff line
		# SPDX-License-Identifier: GPL-2.0
		VERSION = 4
		PATCHLEVEL = 14
		SUBLEVEL = 78
		SUBLEVEL = 79
		EXTRAVERSION =
		NAME = Petit Gorille

		@@ -498,6 +498,8 @@ CLANG_GCC_TC := --gcc-toolchain=$(GCC_TOOLCHAIN)
		endif
		KBUILD_CFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC)
		KBUILD_AFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC)
		KBUILD_CFLAGS += $(call cc-option, -no-integrated-as)
		KBUILD_AFLAGS += $(call cc-option, -no-integrated-as)
		endif

		RETPOLINE_CFLAGS_GCC := -mindirect-branch=thunk-extern -mindirect-branch-register
		@@ -769,8 +771,6 @@ KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)
		# See modpost pattern 2
		KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,)
		KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
		KBUILD_CFLAGS += $(call cc-option, -no-integrated-as)
		KBUILD_AFLAGS += $(call cc-option, -no-integrated-as)
		else

		KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks,)

+8 −0

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		@@ -1042,4 +1042,12 @@ config PANIC_ON_REFCOUNT_ERROR
		or potential memory-leaks) with an object associated with that
		reference counter.

		config HAVE_ARCH_COMPILER_H
		bool
		help
		An architecture can select this if it provides an
		asm/compiler.h header that should be included after
		linux/compiler-*.h in order to override macro definitions that those
		headers generally provide.

		source "kernel/gcov/Kconfig"

+8 −6

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		@@ -106,21 +106,23 @@
		global_timer: timer@1e200 {
		compatible = "arm,cortex-a9-global-timer";
		reg = <0x1e200 0x20>;
		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
		clocks = <&axi_clk>;
		};

		local_timer: local-timer@1e600 {
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0x1e600 0x20>;
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) \|
		IRQ_TYPE_EDGE_RISING)>;
		clocks = <&axi_clk>;
		};

		twd_watchdog: watchdog@1e620 {
		compatible = "arm,cortex-a9-twd-wdt";
		reg = <0x1e620 0x20>;
		interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) \|
		IRQ_TYPE_LEVEL_HIGH)>;
		};

		armpll: armpll {
		@@ -158,7 +160,7 @@
		serial0: serial@600 {
		compatible = "brcm,bcm6345-uart";
		reg = <0x600 0x1b>;
		interrupts = <GIC_SPI 32 0>;
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&periph_clk>;
		clock-names = "periph";
		status = "disabled";
		@@ -167,7 +169,7 @@
		serial1: serial@620 {
		compatible = "brcm,bcm6345-uart";
		reg = <0x620 0x1b>;
		interrupts = <GIC_SPI 33 0>;
		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&periph_clk>;
		clock-names = "periph";
		status = "disabled";
		@@ -180,7 +182,7 @@
		reg = <0x2000 0x600>, <0xf0 0x10>;
		reg-names = "nand", "nand-int-base";
		status = "disabled";
		interrupts = <GIC_SPI 38 0>;
		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "nand";
		};

+11 −0

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		@@ -130,6 +130,17 @@
		};
		};

		&cpu0 {
		/* CPU rated to 1GHz, not 1.2GHz as per the default settings */
		operating-points = <
		/* kHz uV */
		166666 850000
		400000 900000
		800000 1050000
		1000000 1200000
		>;
		};

		&esdhc1 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_esdhc1>;

+1 −1