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Commit b634de4f authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gmc: use proper register for vram type on Fiji 



The offset changed on Fiji.

Reviewed-by: default avatarHarish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent d1518a1d

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

+8 −1
Original line number Diff line number Diff line
@@ -873,6 +873,8 @@ static int gmc_v8_0_late_init(void *handle) 
	return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);

}



#define mmMC_SEQ_MISC0_FIJI 0xA71



static int gmc_v8_0_sw_init(void *handle)

{

	int r;
@@ -882,7 +884,12 @@ static int gmc_v8_0_sw_init(void *handle) 
	if (adev->flags & AMD_IS_APU) {

		adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;

	} else {

		u32 tmp = RREG32(mmMC_SEQ_MISC0);

		u32 tmp;



		if (adev->asic_type == CHIP_FIJI)

			tmp = RREG32(mmMC_SEQ_MISC0_FIJI);

		else

			tmp = RREG32(mmMC_SEQ_MISC0);

		tmp &= MC_SEQ_MISC0__MT__MASK;

		adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp);

	}