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Commit b5f103ab authored by Jordan Crouse's avatar Jordan Crouse Committed by Rob Clark
Browse files

drm/msm: gpu: Add A5XX target support 



Add support for the A5XX family of Adreno GPUs.

Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 4ac277cd

drivers/gpu/drm/msm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ msm-y := \ 
	adreno/adreno_gpu.o \

	adreno/a3xx_gpu.o \

	adreno/a4xx_gpu.o \

	adreno/a5xx_gpu.o \

	hdmi/hdmi.o \

	hdmi/hdmi_audio.o \

	hdmi/hdmi_bridge.o \

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

0 → 100644
+830 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

0 → 100644
+37 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2016 The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */

#ifndef __A5XX_GPU_H__

#define __A5XX_GPU_H__



#include "adreno_gpu.h"



/* Bringing over the hack from the previous targets */

#undef ROP_COPY

#undef ROP_XOR



#include "a5xx.xml.h"



struct a5xx_gpu {

	struct adreno_gpu base;

	struct platform_device *pdev;



	struct drm_gem_object *pm4_bo;

	uint64_t pm4_iova;



	struct drm_gem_object *pfp_bo;

	uint64_t pfp_iova;

};



#define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)



#endif /* __A5XX_GPU_H__ */

drivers/gpu/drm/msm/adreno/adreno_device.c

+23 −1
Original line number Diff line number Diff line
@@ -74,6 +74,14 @@ static const struct adreno_info gpulist[] = { 
		.pfpfw = "a420_pfp.fw",

		.gmem  = (SZ_1M + SZ_512K),

		.init  = a4xx_gpu_init,

	}, {

		.rev = ADRENO_REV(5, 3, 0, ANY_ID),

		.revn = 530,

		.name = "A530",

		.pm4fw = "a530_pm4.fw",

		.pfpfw = "a530_pfp.fw",

		.gmem = SZ_1M,

		.init = a5xx_gpu_init,

	},

};
@@ -83,6 +91,8 @@ MODULE_FIRMWARE("a330_pm4.fw"); 
MODULE_FIRMWARE("a330_pfp.fw");

MODULE_FIRMWARE("a420_pm4.fw");

MODULE_FIRMWARE("a420_pfp.fw");

MODULE_FIRMWARE("a530_fm4.fw");

MODULE_FIRMWARE("a530_pfp.fw");



static inline bool _rev_match(uint8_t entry, uint8_t id)

{
@@ -170,12 +180,20 @@ static void set_gpu_pdev(struct drm_device *dev, 
	priv->gpu_pdev = pdev;

}



static const struct {

	const char *str;

	uint32_t flag;

} quirks[] = {

	{ "qcom,gpu-quirk-two-pass-use-wfi", ADRENO_QUIRK_TWO_PASS_USE_WFI },

	{ "qcom,gpu-quirk-fault-detect-mask", ADRENO_QUIRK_FAULT_DETECT_MASK },

};



static int adreno_bind(struct device *dev, struct device *master, void *data)

{

	static struct adreno_platform_config config = {};

	struct device_node *child, *node = dev->of_node;

	u32 val;

	int ret;

	int ret, i;



	ret = of_property_read_u32(node, "qcom,chipid", &val);

	if (ret) {
@@ -209,6 +227,10 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) 
		return -ENXIO;

	}



	for (i = 0; i < ARRAY_SIZE(quirks); i++)

		if (of_property_read_bool(node, quirks[i].str))

			config.quirks |= quirks[i].flag;



	dev->platform_data = &config;

	set_gpu_pdev(dev_get_drvdata(master), to_platform_device(dev));

	return 0;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+2 −4
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
#include "msm_mmu.h"



#define RB_SIZE    SZ_32K

#define RB_BLKSIZE 16

#define RB_BLKSIZE 32



int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)

{
@@ -54,9 +54,6 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) 
	}

}



#define rbmemptr(adreno_gpu, member)  \

	((adreno_gpu)->memptrs_iova + offsetof(struct adreno_rbmemptrs, member))



int adreno_hw_init(struct msm_gpu *gpu)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
@@ -349,6 +346,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 
	adreno_gpu->gmem = adreno_gpu->info->gmem;

	adreno_gpu->revn = adreno_gpu->info->revn;

	adreno_gpu->rev = config->rev;

	adreno_gpu->quirks = config->quirks;



	gpu->fast_rate = config->fast_rate;

	gpu->slow_rate = config->slow_rate;