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Commit b5e929b8 authored by Amit Kushwaha's avatar Amit Kushwaha
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msm: kgsl: Avoid out of bound register access for A6xx 



Avoid GMU register access when gmu core is disabled.
This change handles warning messages occurred during
register access when GMU is in disabled state.

Change-Id: I6ea9bfaf3ce6d239e0b2b3e8babfaa29bc7053a2
Signed-off-by: default avatarAmit Kushwaha <kushwaha@codeaurora.org>
parent ddd38efd

drivers/gpu/msm/adreno_a6xx_preempt.c

+5 −3
Original line number Diff line number Diff line
@@ -323,6 +323,7 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) 
	 * free when the GPU is already powered on, whereas an OOB requires an

	 * unconditional handshake with the GMU.

	 */

	if (gmu_core_isenabled(device))

		gmu_core_regrmw(device, A6XX_GMU_AO_SPARE_CNTL, 0x0, 0x2);



	/*
@@ -404,8 +405,9 @@ void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit) 
	 * We can now safely clear the preemption keepalive bit, allowing

	 * power collapse to resume its regular activity.

	 */

	gmu_core_regrmw(KGSL_DEVICE(adreno_dev), A6XX_GMU_AO_SPARE_CNTL, 0x2,

			0x0);

	if (gmu_core_isenabled(KGSL_DEVICE(adreno_dev)))

		gmu_core_regrmw(KGSL_DEVICE(adreno_dev),

				A6XX_GMU_AO_SPARE_CNTL, 0x2, 0x0);



	del_timer(&adreno_dev->preempt.timer);