Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b580b899 authored by Russell King's avatar Russell King
Browse files

ARM: GIC: provide a single initialization function for boot CPU 



Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.

Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Tested-by: default avatarAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent e745a667

arch/arm/common/gic.c

+9 −2
Original line number Diff line number Diff line
@@ -213,7 +213,7 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) 
	set_irq_chained_handler(irq, gic_handle_cascade_irq);

}



void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,

static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,

	unsigned int irq_start)

{

	unsigned int gic_irqs, irq_limit, i;
@@ -314,6 +314,13 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) 
	writel(1, base + GIC_CPU_CTRL);

}



void __init gic_init(unsigned int gic_nr, unsigned int irq_start,

	void __iomem *dist_base, void __iomem *cpu_base)

{

	gic_dist_init(gic_nr, dist_base, irq_start);

	gic_cpu_init(gic_nr, cpu_base);

}



#ifdef CONFIG_SMP

void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)

{

arch/arm/include/asm/hardware/gic.h

+1 −1
Original line number Diff line number Diff line
@@ -33,8 +33,8 @@ 
#define GIC_DIST_SOFTINT		0xf00



#ifndef __ASSEMBLY__

void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);

void gic_cpu_init(unsigned int gic_nr, void __iomem *base);

void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);

void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);

void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);

#endif

arch/arm/mach-cns3xxx/core.c

+2 −2
Original line number Diff line number Diff line
@@ -74,8 +74,8 @@ void __iomem *gic_cpu_base_addr; 
void __init cns3xxx_init_irq(void)

{

	gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);

	gic_dist_init(0, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 29);

	gic_cpu_init(0, gic_cpu_base_addr);

	gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),

		gic_cpu_base_addr);

}



void cns3xxx_power_off(void)

arch/arm/mach-msm/board-msm8x60.c

+1 −2
Original line number Diff line number Diff line
@@ -44,9 +44,8 @@ static void __init msm8x60_init_irq(void) 
{

	unsigned int i;



	gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START);

	gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;

	gic_cpu_init(0, MSM_QGIC_CPU_BASE);

	gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr);



	/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */

	writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);

arch/arm/mach-omap2/omap4-common.c

+2 −2
Original line number Diff line number Diff line
@@ -35,12 +35,12 @@ void __init gic_init_irq(void) 
	/* Static mapping, never released */

	gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);

	BUG_ON(!gic_dist_base_addr);

	gic_dist_init(0, gic_dist_base_addr, 29);



	/* Static mapping, never released */

	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);

	BUG_ON(!gic_cpu_base_addr);

	gic_cpu_init(0, gic_cpu_base_addr);



	gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr);

}



#ifdef CONFIG_CACHE_L2X0