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Commit b521973b authored by Ville Syrjälä's avatar Ville Syrjälä
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drm/i915: Don't read out port_clock on CHV when DPLL is disabled 



Check whether the DPLL is even enabled before readoing out the dividers
and trying to derive port_clock on CHV. We already did this on VLV.

Also remove the comment "MIPI" comment from the VLV code since we call
this function whenever the pipe is enabled.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458052809-23426-9-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 7f7d8dd6

drivers/gpu/drm/i915/intel_display.c

+6 −2
Original line number Diff line number Diff line
@@ -8009,8 +8009,8 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc, 
	u32 mdiv;

	int refclk = 100000;



	/* In case of MIPI DPLL will not even be used */

	if (!(pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE))

	/* In case of DSI, DPLL will not be used */

	if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0)

		return;



	mutex_lock(&dev_priv->sb_lock);
@@ -8106,6 +8106,10 @@ static void chv_crtc_clock_get(struct intel_crtc *crtc, 
	u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3;

	int refclk = 100000;



	/* In case of DSI, DPLL will not be used */

	if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0)

		return;



	mutex_lock(&dev_priv->sb_lock);

	cmn_dw13 = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW13(port));

	pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port));