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Commit b47eb79e authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/dsi-staging: selectively enable DSI clk gating"

parents 3e308f0f 7ee16f7b

drivers/clk/qcom/dispcc-sm8150.c

+1 −1
Original line number Diff line number Diff line
@@ -1593,7 +1593,7 @@ static int disp_cc_sm8150_probe(struct platform_device *pdev) 
	clk_trion_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config);



	/* Enable clock gating for DSI and MDP clocks */

	regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x670, 0x670);

	regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);



	ret = qcom_cc_really_probe(pdev, &disp_cc_sm8150_desc, regmap);

	if (ret) {

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c

+3 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl, 
		ctrl->ops.schedule_dma_cmd = NULL;

		ctrl->ops.get_cont_splash_status = NULL;

		ctrl->ops.kickoff_command_non_embedded_mode = NULL;

		ctrl->ops.config_clk_gating = NULL;

		break;

	case DSI_CTRL_VERSION_2_0:

		ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;
@@ -102,10 +103,12 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl, 
		ctrl->ops.schedule_dma_cmd = NULL;

		ctrl->ops.get_cont_splash_status = NULL;

		ctrl->ops.kickoff_command_non_embedded_mode = NULL;

		ctrl->ops.config_clk_gating = NULL;

		break;

	case DSI_CTRL_VERSION_2_2:

	case DSI_CTRL_VERSION_2_3:

		ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config;

		ctrl->ops.config_clk_gating = dsi_ctrl_hw_22_config_clk_gating;

		ctrl->ops.get_cont_splash_status =

			dsi_ctrl_hw_22_get_cont_splash_status;

		ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -242,5 +242,7 @@ void dsi_ctrl_hw_kickoff_non_embedded_mode(struct dsi_ctrl_hw *ctrl, 


/* Definitions specific to 2.2 DSI controller hardware */

bool dsi_ctrl_hw_22_get_cont_splash_status(struct dsi_ctrl_hw *ctrl);

void dsi_ctrl_hw_22_config_clk_gating(struct dsi_ctrl_hw *ctrl, bool enable,

		enum dsi_clk_gate_type clk_selection);



#endif /* _DSI_CATALOG_H_ */

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+23 −0
Original line number Diff line number Diff line
@@ -2198,6 +2198,29 @@ int dsi_ctrl_set_roi(struct dsi_ctrl *dsi_ctrl, struct dsi_rect *roi, 
	return rc;

}



/**

 * dsi_ctrl_config_clk_gating() - Enable/disable DSI PHY clk gating.

 * @dsi_ctrl:                     DSI controller handle.

 * @enable:                       Enable/disable DSI PHY clk gating

 * @clk_selection:                clock to enable/disable clock gating

 *

 * Return: error code.

 */

int dsi_ctrl_config_clk_gating(struct dsi_ctrl *dsi_ctrl, bool enable,

			enum dsi_clk_gate_type clk_selection)

{

	if (!dsi_ctrl) {

		pr_err("Invalid params\n");

		return -EINVAL;

	}



	if (dsi_ctrl->hw.ops.config_clk_gating)

		dsi_ctrl->hw.ops.config_clk_gating(&dsi_ctrl->hw, enable,

				clk_selection);



	return 0;

}



/**

 * dsi_ctrl_phy_reset_config() - Mask/unmask propagation of ahb reset signal

 *	to DSI PHY hardware.

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h

+11 −0
Original line number Diff line number Diff line
@@ -392,6 +392,17 @@ int dsi_ctrl_phy_sw_reset(struct dsi_ctrl *dsi_ctrl); 
 */

int dsi_ctrl_phy_reset_config(struct dsi_ctrl *dsi_ctrl, bool enable);



/**

 * dsi_ctrl_config_clk_gating() - Enable/Disable DSI PHY clk gating

 * @dsi_ctrl:        DSI controller handle.

 * @enable:          Enable/disable DSI PHY clk gating

 * @clk_selection:   clock selection for gating

 *

 * Return: error code.

 */

int dsi_ctrl_config_clk_gating(struct dsi_ctrl *dsi_ctrl, bool enable,

		 enum dsi_clk_gate_type clk_selection);



/**

 * dsi_ctrl_soft_reset() - perform a soft reset on DSI controller

 * @dsi_ctrl:         DSI controller handle.