Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b401796c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "This is radeon and intel fixes, and is a small bit larger than I'm
  guessing you'd like it to be.

   - i915: fixes 32-bit highmem i915 blank screen, semaphore hang and
     runtime pm fix

   - radeon: gpuvm stability fix for hangs since 3.15, and hang/reboot
     regression on TN/RL devices,

  The only slightly controversial one is the change to use GB for the
  vm_size, which I'm letting through as its a new interface we defined
  in this merge window, and I'd prefer to have the released kernel have
  the final interface rather than changing it later"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon: fix cut and paste issue for hawaii.
  drm/radeon: fix irq ring buffer overflow handling
  drm/i915: Simplify i915_gem_release_all_mmaps()
  drm/radeon: fix error handling in radeon_vm_bo_set_addr
  drm/i915: fix freeze with blank screen booting highmem
  drm/i915: Reorder the semaphore deadlock check, again
  drm/radeon/TN: only enable bapm on MSI systems
  drm/radeon: fix VM IB handling
  drm/radeon: fix handling of radeon_vm_bo_rmv v3
  drm/radeon: let's use GB for vm_size (v2)
parents 9c550218 1b2c4869

drivers/gpu/drm/i915/i915_gem.c

+9 −16
Original line number Original line Diff line number Diff line
@@ -1616,22 +1616,6 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 
	return ret;

	return ret;

}

}





void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv)

{

	struct i915_vma *vma;



	/*

	 * Only the global gtt is relevant for gtt memory mappings, so restrict

	 * list traversal to objects bound into the global address space. Note

	 * that the active list should be empty, but better safe than sorry.

	 */

	WARN_ON(!list_empty(&dev_priv->gtt.base.active_list));

	list_for_each_entry(vma, &dev_priv->gtt.base.active_list, mm_list)

		i915_gem_release_mmap(vma->obj);

	list_for_each_entry(vma, &dev_priv->gtt.base.inactive_list, mm_list)

		i915_gem_release_mmap(vma->obj);

}



/**

/**

 * i915_gem_release_mmap - remove physical page mappings

 * i915_gem_release_mmap - remove physical page mappings

 * @obj: obj in question

 * @obj: obj in question
@@ -1657,6 +1641,15 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj) 
	obj->fault_mappable = false;

	obj->fault_mappable = false;

}

}





void

i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv)

{

	struct drm_i915_gem_object *obj;



	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)

		i915_gem_release_mmap(obj);

}



uint32_t

uint32_t

i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode)

i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode)

{

{

drivers/gpu/drm/i915/i915_gem_render_state.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -31,7 +31,7 @@ 
struct i915_render_state {

struct i915_render_state {

	struct drm_i915_gem_object *obj;

	struct drm_i915_gem_object *obj;

	unsigned long ggtt_offset;

	unsigned long ggtt_offset;

	void *batch;

	u32 *batch;

	u32 size;

	u32 size;

	u32 len;

	u32 len;

};

};
@@ -80,7 +80,7 @@ static struct i915_render_state *render_state_alloc(struct drm_device *dev) 




static void render_state_free(struct i915_render_state *so)

static void render_state_free(struct i915_render_state *so)

{

{

	kunmap(so->batch);

	kunmap(kmap_to_page(so->batch));

	i915_gem_object_ggtt_unpin(so->obj);

	i915_gem_object_ggtt_unpin(so->obj);

	drm_gem_object_unreference(&so->obj->base);

	drm_gem_object_unreference(&so->obj->base);

	kfree(so);

	kfree(so);

drivers/gpu/drm/i915/i915_irq.c

+4 −7
Original line number Original line Diff line number Diff line
@@ -2845,7 +2845,7 @@ static int semaphore_passed(struct intel_engine_cs *ring) 
{

{

	struct drm_i915_private *dev_priv = ring->dev->dev_private;

	struct drm_i915_private *dev_priv = ring->dev->dev_private;

	struct intel_engine_cs *signaller;

	struct intel_engine_cs *signaller;

	u32 seqno, ctl;

	u32 seqno;





	ring->hangcheck.deadlock++;

	ring->hangcheck.deadlock++;
@@ -2857,15 +2857,12 @@ static int semaphore_passed(struct intel_engine_cs *ring) 
	if (signaller->hangcheck.deadlock >= I915_NUM_RINGS)

	if (signaller->hangcheck.deadlock >= I915_NUM_RINGS)

		return -1;

		return -1;





	/* cursory check for an unkickable deadlock */

	ctl = I915_READ_CTL(signaller);

	if (ctl & RING_WAIT_SEMAPHORE && semaphore_passed(signaller) < 0)

		return -1;



	if (i915_seqno_passed(signaller->get_seqno(signaller, false), seqno))

	if (i915_seqno_passed(signaller->get_seqno(signaller, false), seqno))

		return 1;

		return 1;





	if (signaller->hangcheck.deadlock)

	/* cursory check for an unkickable deadlock */

	if (I915_READ_CTL(signaller) & RING_WAIT_SEMAPHORE &&

	    semaphore_passed(signaller) < 0)

		return -1;

		return -1;





	return 0;

	return 0;

drivers/gpu/drm/radeon/cik.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -2291,6 +2291,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) 
				gb_tile_moden = 0;

				gb_tile_moden = 0;

				break;

				break;

			}

			}

			rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden;

			WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);

			WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);

		}

		}

	} else if (num_pipe_configs == 8) {

	} else if (num_pipe_configs == 8) {
@@ -7376,6 +7377,7 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev) 
		tmp = RREG32(IH_RB_CNTL);

		tmp = RREG32(IH_RB_CNTL);

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		WREG32(IH_RB_CNTL, tmp);

		WREG32(IH_RB_CNTL, tmp);

		wptr &= ~RB_OVERFLOW;

	}

	}

	return (wptr & rdev->ih.ptr_mask);

	return (wptr & rdev->ih.ptr_mask);

}

}

drivers/gpu/drm/radeon/evergreen.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -4756,6 +4756,7 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev) 
		tmp = RREG32(IH_RB_CNTL);

		tmp = RREG32(IH_RB_CNTL);

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		WREG32(IH_RB_CNTL, tmp);

		WREG32(IH_RB_CNTL, tmp);

		wptr &= ~RB_OVERFLOW;

	}

	}

	return (wptr & rdev->ih.ptr_mask);

	return (wptr & rdev->ih.ptr_mask);

}

}