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Commit b3f797ac authored Apr 28, 2014 by Ville Syrjälä Committed by Daniel Vetter May 20, 2014

drm/i915/chv: Add some workaround notes



We implement the following workarounds:
* WaDisableAsyncFlipPerfMode:chv
* WaProgramMiArbOnOffAroundMiSetContext:chv

v2: Drop WaDisableSemaphoreAndSyncFlipWait note

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent c631780f

drivers/gpu/drm/i915/i915_gem_context.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -568,7 +568,7 @@ mi_set_context(struct intel_ring_buffer *ring,
		if (ret)
		return ret;

		/* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw,bdw */
		/* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw,bdw,chv */
		if (INTEL_INFO(ring->dev)->gen >= 7)
		intel_ring_emit(ring, MI_ARB_ON_OFF \| MI_ARB_DISABLE);
		else

drivers/gpu/drm/i915/intel_ringbuffer.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -610,7 +610,7 @@ static int init_render_ring(struct intel_ring_buffer *ring)
		* to use MI_WAIT_FOR_EVENT within the CS. It should already be
		* programmed to '1' on all products.
		*
		* WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv,bdw
		* WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv,bdw,chv
		*/
		if (INTEL_INFO(dev)->gen >= 6)
		I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));