Loading drivers/clk/qcom/clk-alpha-pll.c +4 −2 Original line number Diff line number Diff line Loading @@ -2066,7 +2066,8 @@ static void clk_fabia_pll_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(pll->clkr.regmap, pll->offset + data[i].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data[i].name, val); } regmap_read(pll->clkr.regmap, pll->offset + data[0].offset, &val); Loading @@ -2074,7 +2075,8 @@ static void clk_fabia_pll_list_registers(struct seq_file *f, struct clk_hw *hw) if (val & PLL_FSM_ENA) { regmap_read(pll->clkr.regmap, pll->clkr.enable_reg + data1[0].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data1[0].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data1[0].name, val); } } Loading drivers/clk/qcom/clk-cpu-qcs405.c +2 −1 Original line number Diff line number Diff line Loading @@ -153,7 +153,8 @@ static void cpucc_clk_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(cpuclk->clkr.regmap, cpuclk->reg_offset + data[i].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data[i].name, val); } } Loading drivers/clk/qcom/clk-pll.c +2 −1 Original line number Diff line number Diff line Loading @@ -392,7 +392,8 @@ static void clk_pll_hf_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(pll->clkr.regmap, pll->mode_reg + data[i].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data[i].name, val); } } Loading Loading
drivers/clk/qcom/clk-alpha-pll.c +4 −2 Original line number Diff line number Diff line Loading @@ -2066,7 +2066,8 @@ static void clk_fabia_pll_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(pll->clkr.regmap, pll->offset + data[i].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data[i].name, val); } regmap_read(pll->clkr.regmap, pll->offset + data[0].offset, &val); Loading @@ -2074,7 +2075,8 @@ static void clk_fabia_pll_list_registers(struct seq_file *f, struct clk_hw *hw) if (val & PLL_FSM_ENA) { regmap_read(pll->clkr.regmap, pll->clkr.enable_reg + data1[0].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data1[0].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data1[0].name, val); } } Loading
drivers/clk/qcom/clk-cpu-qcs405.c +2 −1 Original line number Diff line number Diff line Loading @@ -153,7 +153,8 @@ static void cpucc_clk_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(cpuclk->clkr.regmap, cpuclk->reg_offset + data[i].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data[i].name, val); } } Loading
drivers/clk/qcom/clk-pll.c +2 −1 Original line number Diff line number Diff line Loading @@ -392,7 +392,8 @@ static void clk_pll_hf_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(pll->clkr.regmap, pll->mode_reg + data[i].offset, &val); seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); clock_debug_output(f, false, "%20s: 0x%.8x\n", data[i].name, val); } } Loading