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Commit b36ba30c authored by Stephen Boyd's avatar Stephen Boyd Committed by Mike Turquette
Browse files

clk: qcom: Add reset controller support 



Reset controllers and clock controllers are combined into one IP
block on Qualcomm chipsets. Usually a reset signal is associated
with each clock branch but sometimes a reset signal is associated
with a handful of clocks. Either way the register interface is
the same; set a bit to assert a reset and clear a bit to deassert
a reset. Add support for these types of resets signals.

Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 6e0ad1b6

drivers/clk/qcom/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -2,4 +2,4 @@ config COMMON_CLK_QCOM 
	tristate "Support for Qualcomm's clock controllers"

	depends on OF

	select REGMAP_MMIO

	select RESET_CONTROLLER

drivers/clk/qcom/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -5,3 +5,4 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-pll.o 
clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg.o

clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg2.o

clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o

clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o

drivers/clk/qcom/reset.c

0 → 100644
+63 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013, The Linux Foundation. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <linux/bitops.h>

#include <linux/export.h>

#include <linux/regmap.h>

#include <linux/reset-controller.h>

#include <linux/delay.h>



#include "reset.h"



static int qcom_reset(struct reset_controller_dev *rcdev, unsigned long id)

{

	rcdev->ops->assert(rcdev, id);

	udelay(1);

	rcdev->ops->deassert(rcdev, id);

	return 0;

}



static int

qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)

{

	struct qcom_reset_controller *rst;

	const struct qcom_reset_map *map;

	u32 mask;



	rst = to_qcom_reset_controller(rcdev);

	map = &rst->reset_map[id];

	mask = BIT(map->bit);



	return regmap_update_bits(rst->regmap, map->reg, mask, mask);

}



static int

qcom_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)

{

	struct qcom_reset_controller *rst;

	const struct qcom_reset_map *map;

	u32 mask;



	rst = to_qcom_reset_controller(rcdev);

	map = &rst->reset_map[id];

	mask = BIT(map->bit);



	return regmap_update_bits(rst->regmap, map->reg, mask, 0);

}



struct reset_control_ops qcom_reset_ops = {

	.reset = qcom_reset,

	.assert = qcom_reset_assert,

	.deassert = qcom_reset_deassert,

};

EXPORT_SYMBOL_GPL(qcom_reset_ops);

drivers/clk/qcom/reset.h

0 → 100644
+37 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013, The Linux Foundation. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __QCOM_CLK_RESET_H__

#define __QCOM_CLK_RESET_H__



#include <linux/reset-controller.h>



struct qcom_reset_map {

	unsigned int reg;

	u8 bit;

};



struct regmap;



struct qcom_reset_controller {

	const struct qcom_reset_map *reset_map;

	struct regmap *regmap;

	struct reset_controller_dev rcdev;

};



#define to_qcom_reset_controller(r) \

	container_of(r, struct qcom_reset_controller, rcdev);



extern struct reset_control_ops qcom_reset_ops;



#endif