Commit b359f2b2 authored Oct 26, 2018 by Shefali Jain

clk: qcom: Add period register to measure DDR clock in SDMMAGPIE



Add an clock period register used to calculate the frequency
of the DDR clock.

Change-Id: I2030449ebc393163476ee10595a9f45a8d70fe60
Signed-off-by: Shefali Jain <shefjain@codeaurora.org>

parent 3424e1d3

drivers/clk/qcom/debugcc-sdmmagpie.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -273,6 +273,7 @@ static struct clk_debug_mux gcc_debug_mux = {
		.src_sel_shift = 0,
		.post_div_mask = 0xF,
		.post_div_shift = 0,
		.period_offset = 0x50,
		MUX_SRC_LIST(
		{ "cam_cc_bps_ahb_clk", 0x46, 4, CAM_CC,
		0xE, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },