Loading drivers/mtd/bcm47xxpart.c +24 −18 Original line number Diff line number Diff line Loading @@ -66,11 +66,13 @@ static const char *bcm47xxpart_trx_data_part_name(struct mtd_info *master, { uint32_t buf; size_t bytes_read; int err; if (mtd_read(master, offset, sizeof(buf), &bytes_read, (uint8_t *)&buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); err = mtd_read(master, offset, sizeof(buf), &bytes_read, (uint8_t *)&buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while parsing (offset: 0x%X): %d\n", offset, err); goto out_default; } Loading @@ -95,6 +97,7 @@ static int bcm47xxpart_parse(struct mtd_info *master, int trx_part = -1; int last_trx_part = -1; int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, }; int err; /* * Some really old flashes (like AT45DB*) had smaller erasesize-s, but Loading @@ -118,8 +121,8 @@ static int bcm47xxpart_parse(struct mtd_info *master, /* Parse block by block looking for magics */ for (offset = 0; offset <= master->size - blocksize; offset += blocksize) { /* Nothing more in higher memory */ if (offset >= 0x2000000) /* Nothing more in higher memory on BCM47XX (MIPS) */ if (config_enabled(CONFIG_BCM47XX) && offset >= 0x2000000) break; if (curr_part >= BCM47XXPART_MAX_PARTS) { Loading @@ -128,10 +131,11 @@ static int bcm47xxpart_parse(struct mtd_info *master, } /* Read beginning of the block */ if (mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); err = mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, &bytes_read, (uint8_t *)buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while parsing (offset: 0x%X): %d\n", offset, err); continue; } Loading Loading @@ -254,10 +258,11 @@ static int bcm47xxpart_parse(struct mtd_info *master, } /* Read middle of the block */ if (mtd_read(master, offset + 0x8000, 0x4, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); err = mtd_read(master, offset + 0x8000, 0x4, &bytes_read, (uint8_t *)buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while parsing (offset: 0x%X): %d\n", offset, err); continue; } Loading @@ -277,10 +282,11 @@ static int bcm47xxpart_parse(struct mtd_info *master, } offset = master->size - possible_nvram_sizes[i]; if (mtd_read(master, offset, 0x4, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while reading at offset 0x%X!\n", offset); err = mtd_read(master, offset, 0x4, &bytes_read, (uint8_t *)buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while reading (offset 0x%X): %d\n", offset, err); continue; } Loading drivers/mtd/nand/atmel_nand.c +5 −7 Original line number Diff line number Diff line Loading @@ -825,7 +825,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, *(buf + byte_pos) ^= (1 << bit_pos); pos = sector_num * host->pmecc_sector_size + byte_pos; dev_info(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", dev_dbg(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", pos, bit_pos, err_byte, *(buf + byte_pos)); } else { /* Bit flip in OOB area */ Loading @@ -835,7 +835,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, ecc[tmp] ^= (1 << bit_pos); pos = tmp + nand_chip->ecc.layout->eccpos[0]; dev_info(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", dev_dbg(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", pos, bit_pos, err_byte, ecc[tmp]); } Loading Loading @@ -1486,8 +1486,6 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) ecc_writel(host->ecc, CR, ATMEL_ECC_RST); } static const struct of_device_id atmel_nand_dt_ids[]; static int atmel_of_init_port(struct atmel_nand_host *host, struct device_node *np) { Loading @@ -1498,7 +1496,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host, enum of_gpio_flags flags = 0; host->caps = (struct atmel_nand_caps *) of_match_device(atmel_nand_dt_ids, host->dev)->data; of_device_get_match_data(host->dev); if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) { if (val >= 32) { Loading Loading @@ -1550,7 +1548,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host, if ((val != 2) && (val != 4) && (val != 8) && (val != 12) && (val != 24)) { dev_err(host->dev, "Unsupported PMECC correction capability: %d; should be 2, 4, 8, 12 or 24\n", "Required ECC strength not supported: %u\n", val); return -EINVAL; } Loading @@ -1560,7 +1558,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host, if (of_property_read_u32(np, "atmel,pmecc-sector-size", &val) == 0) { if ((val != 512) && (val != 1024)) { dev_err(host->dev, "Unsupported PMECC sector size: %d; should be 512 or 1024 bytes\n", "Required ECC sector size not supported: %u\n", val); return -EINVAL; } Loading drivers/mtd/nand/gpmi-nand/gpmi-nand.c +60 −13 Original line number Diff line number Diff line /* * Freescale GPMI NAND Flash Driver * * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. * Copyright (C) 2008 Embedded Alley Solutions, Inc. * * This program is free software; you can redistribute it and/or modify Loading Loading @@ -136,7 +136,7 @@ static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) * * We may have available oob space in this case. */ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) static int set_geometry_by_ecc_info(struct gpmi_nand_data *this) { struct bch_geometry *geo = &this->bch_geometry; struct nand_chip *chip = &this->nand; Loading @@ -145,7 +145,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) unsigned int block_mark_bit_offset; if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) return false; return -EINVAL; switch (chip->ecc_step_ds) { case SZ_512: Loading @@ -158,19 +158,19 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) dev_err(this->dev, "unsupported nand chip. ecc bits : %d, ecc size : %d\n", chip->ecc_strength_ds, chip->ecc_step_ds); return false; return -EINVAL; } geo->ecc_chunk_size = chip->ecc_step_ds; geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); if (!gpmi_check_ecc(this)) return false; return -EINVAL; /* Keep the C >= O */ if (geo->ecc_chunk_size < mtd->oobsize) { dev_err(this->dev, "unsupported nand chip. ecc size: %d, oob size : %d\n", chip->ecc_step_ds, mtd->oobsize); return false; return -EINVAL; } /* The default value, see comment in the legacy_set_geometry(). */ Loading Loading @@ -242,7 +242,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) + ALIGN(geo->ecc_chunk_count, 4); if (!this->swap_block_mark) return true; return 0; /* For bit swap. */ block_mark_bit_offset = mtd->writesize * 8 - Loading @@ -251,7 +251,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) geo->block_mark_byte_offset = block_mark_bit_offset / 8; geo->block_mark_bit_offset = block_mark_bit_offset % 8; return true; return 0; } static int legacy_set_geometry(struct gpmi_nand_data *this) Loading Loading @@ -285,7 +285,8 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) geo->ecc_strength = get_ecc_strength(this); if (!gpmi_check_ecc(this)) { dev_err(this->dev, "required ecc strength of the NAND chip: %d is not supported by the GPMI controller (%d)\n", "ecc strength: %d cannot be supported by the controller (%d)\n" "try to use minimum ecc strength that NAND chip required\n", geo->ecc_strength, this->devdata->bch_max_ecc_strength); return -EINVAL; Loading Loading @@ -366,10 +367,11 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) int common_nfc_set_geometry(struct gpmi_nand_data *this) { if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc") && set_geometry_by_ecc_info(this)) if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) || legacy_set_geometry(this)) return set_geometry_by_ecc_info(this); return 0; return legacy_set_geometry(this); } struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) Loading Loading @@ -2033,9 +2035,54 @@ static int gpmi_nand_remove(struct platform_device *pdev) return 0; } #ifdef CONFIG_PM_SLEEP static int gpmi_pm_suspend(struct device *dev) { struct gpmi_nand_data *this = dev_get_drvdata(dev); release_dma_channels(this); return 0; } static int gpmi_pm_resume(struct device *dev) { struct gpmi_nand_data *this = dev_get_drvdata(dev); int ret; ret = acquire_dma_channels(this); if (ret < 0) return ret; /* re-init the GPMI registers */ this->flags &= ~GPMI_TIMING_INIT_OK; ret = gpmi_init(this); if (ret) { dev_err(this->dev, "Error setting GPMI : %d\n", ret); return ret; } /* re-init the BCH registers */ ret = bch_set_geometry(this); if (ret) { dev_err(this->dev, "Error setting BCH : %d\n", ret); return ret; } /* re-init others */ gpmi_extra_init(this); return 0; } #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops gpmi_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(gpmi_pm_suspend, gpmi_pm_resume) }; static struct platform_driver gpmi_nand_driver = { .driver = { .name = "gpmi-nand", .pm = &gpmi_pm_ops, .of_match_table = gpmi_nand_id_table, }, .probe = gpmi_nand_probe, Loading drivers/mtd/nand/mpc5121_nfc.c +2 −5 Original line number Diff line number Diff line Loading @@ -626,7 +626,7 @@ static void mpc5121_nfc_free(struct device *dev, struct mtd_info *mtd) static int mpc5121_nfc_probe(struct platform_device *op) { struct device_node *rootnode, *dn = op->dev.of_node; struct device_node *dn = op->dev.of_node; struct clk *clk; struct device *dev = &op->dev; struct mpc5121_nfc_prv *prv; Loading Loading @@ -712,18 +712,15 @@ static int mpc5121_nfc_probe(struct platform_device *op) chip->ecc.mode = NAND_ECC_SOFT; /* Support external chip-select logic on ADS5121 board */ rootnode = of_find_node_by_path("/"); if (of_device_is_compatible(rootnode, "fsl,mpc5121ads")) { if (of_machine_is_compatible("fsl,mpc5121ads")) { retval = ads5121_chipselect_init(mtd); if (retval) { dev_err(dev, "Chipselect init error!\n"); of_node_put(rootnode); return retval; } chip->select_chip = ads5121_select_chip; } of_node_put(rootnode); /* Enable NFC clock */ clk = devm_clk_get(dev, "ipg"); Loading drivers/mtd/nand/nand_bbt.c +0 −2 Original line number Diff line number Diff line Loading @@ -1373,5 +1373,3 @@ int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs) return ret; } EXPORT_SYMBOL(nand_scan_bbt); Loading
drivers/mtd/bcm47xxpart.c +24 −18 Original line number Diff line number Diff line Loading @@ -66,11 +66,13 @@ static const char *bcm47xxpart_trx_data_part_name(struct mtd_info *master, { uint32_t buf; size_t bytes_read; int err; if (mtd_read(master, offset, sizeof(buf), &bytes_read, (uint8_t *)&buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); err = mtd_read(master, offset, sizeof(buf), &bytes_read, (uint8_t *)&buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while parsing (offset: 0x%X): %d\n", offset, err); goto out_default; } Loading @@ -95,6 +97,7 @@ static int bcm47xxpart_parse(struct mtd_info *master, int trx_part = -1; int last_trx_part = -1; int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, }; int err; /* * Some really old flashes (like AT45DB*) had smaller erasesize-s, but Loading @@ -118,8 +121,8 @@ static int bcm47xxpart_parse(struct mtd_info *master, /* Parse block by block looking for magics */ for (offset = 0; offset <= master->size - blocksize; offset += blocksize) { /* Nothing more in higher memory */ if (offset >= 0x2000000) /* Nothing more in higher memory on BCM47XX (MIPS) */ if (config_enabled(CONFIG_BCM47XX) && offset >= 0x2000000) break; if (curr_part >= BCM47XXPART_MAX_PARTS) { Loading @@ -128,10 +131,11 @@ static int bcm47xxpart_parse(struct mtd_info *master, } /* Read beginning of the block */ if (mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); err = mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, &bytes_read, (uint8_t *)buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while parsing (offset: 0x%X): %d\n", offset, err); continue; } Loading Loading @@ -254,10 +258,11 @@ static int bcm47xxpart_parse(struct mtd_info *master, } /* Read middle of the block */ if (mtd_read(master, offset + 0x8000, 0x4, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); err = mtd_read(master, offset + 0x8000, 0x4, &bytes_read, (uint8_t *)buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while parsing (offset: 0x%X): %d\n", offset, err); continue; } Loading @@ -277,10 +282,11 @@ static int bcm47xxpart_parse(struct mtd_info *master, } offset = master->size - possible_nvram_sizes[i]; if (mtd_read(master, offset, 0x4, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while reading at offset 0x%X!\n", offset); err = mtd_read(master, offset, 0x4, &bytes_read, (uint8_t *)buf); if (err && !mtd_is_bitflip(err)) { pr_err("mtd_read error while reading (offset 0x%X): %d\n", offset, err); continue; } Loading
drivers/mtd/nand/atmel_nand.c +5 −7 Original line number Diff line number Diff line Loading @@ -825,7 +825,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, *(buf + byte_pos) ^= (1 << bit_pos); pos = sector_num * host->pmecc_sector_size + byte_pos; dev_info(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", dev_dbg(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", pos, bit_pos, err_byte, *(buf + byte_pos)); } else { /* Bit flip in OOB area */ Loading @@ -835,7 +835,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, ecc[tmp] ^= (1 << bit_pos); pos = tmp + nand_chip->ecc.layout->eccpos[0]; dev_info(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", dev_dbg(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", pos, bit_pos, err_byte, ecc[tmp]); } Loading Loading @@ -1486,8 +1486,6 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) ecc_writel(host->ecc, CR, ATMEL_ECC_RST); } static const struct of_device_id atmel_nand_dt_ids[]; static int atmel_of_init_port(struct atmel_nand_host *host, struct device_node *np) { Loading @@ -1498,7 +1496,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host, enum of_gpio_flags flags = 0; host->caps = (struct atmel_nand_caps *) of_match_device(atmel_nand_dt_ids, host->dev)->data; of_device_get_match_data(host->dev); if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) { if (val >= 32) { Loading Loading @@ -1550,7 +1548,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host, if ((val != 2) && (val != 4) && (val != 8) && (val != 12) && (val != 24)) { dev_err(host->dev, "Unsupported PMECC correction capability: %d; should be 2, 4, 8, 12 or 24\n", "Required ECC strength not supported: %u\n", val); return -EINVAL; } Loading @@ -1560,7 +1558,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host, if (of_property_read_u32(np, "atmel,pmecc-sector-size", &val) == 0) { if ((val != 512) && (val != 1024)) { dev_err(host->dev, "Unsupported PMECC sector size: %d; should be 512 or 1024 bytes\n", "Required ECC sector size not supported: %u\n", val); return -EINVAL; } Loading
drivers/mtd/nand/gpmi-nand/gpmi-nand.c +60 −13 Original line number Diff line number Diff line /* * Freescale GPMI NAND Flash Driver * * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. * Copyright (C) 2008 Embedded Alley Solutions, Inc. * * This program is free software; you can redistribute it and/or modify Loading Loading @@ -136,7 +136,7 @@ static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) * * We may have available oob space in this case. */ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) static int set_geometry_by_ecc_info(struct gpmi_nand_data *this) { struct bch_geometry *geo = &this->bch_geometry; struct nand_chip *chip = &this->nand; Loading @@ -145,7 +145,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) unsigned int block_mark_bit_offset; if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) return false; return -EINVAL; switch (chip->ecc_step_ds) { case SZ_512: Loading @@ -158,19 +158,19 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) dev_err(this->dev, "unsupported nand chip. ecc bits : %d, ecc size : %d\n", chip->ecc_strength_ds, chip->ecc_step_ds); return false; return -EINVAL; } geo->ecc_chunk_size = chip->ecc_step_ds; geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); if (!gpmi_check_ecc(this)) return false; return -EINVAL; /* Keep the C >= O */ if (geo->ecc_chunk_size < mtd->oobsize) { dev_err(this->dev, "unsupported nand chip. ecc size: %d, oob size : %d\n", chip->ecc_step_ds, mtd->oobsize); return false; return -EINVAL; } /* The default value, see comment in the legacy_set_geometry(). */ Loading Loading @@ -242,7 +242,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) + ALIGN(geo->ecc_chunk_count, 4); if (!this->swap_block_mark) return true; return 0; /* For bit swap. */ block_mark_bit_offset = mtd->writesize * 8 - Loading @@ -251,7 +251,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) geo->block_mark_byte_offset = block_mark_bit_offset / 8; geo->block_mark_bit_offset = block_mark_bit_offset % 8; return true; return 0; } static int legacy_set_geometry(struct gpmi_nand_data *this) Loading Loading @@ -285,7 +285,8 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) geo->ecc_strength = get_ecc_strength(this); if (!gpmi_check_ecc(this)) { dev_err(this->dev, "required ecc strength of the NAND chip: %d is not supported by the GPMI controller (%d)\n", "ecc strength: %d cannot be supported by the controller (%d)\n" "try to use minimum ecc strength that NAND chip required\n", geo->ecc_strength, this->devdata->bch_max_ecc_strength); return -EINVAL; Loading Loading @@ -366,10 +367,11 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) int common_nfc_set_geometry(struct gpmi_nand_data *this) { if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc") && set_geometry_by_ecc_info(this)) if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) || legacy_set_geometry(this)) return set_geometry_by_ecc_info(this); return 0; return legacy_set_geometry(this); } struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) Loading Loading @@ -2033,9 +2035,54 @@ static int gpmi_nand_remove(struct platform_device *pdev) return 0; } #ifdef CONFIG_PM_SLEEP static int gpmi_pm_suspend(struct device *dev) { struct gpmi_nand_data *this = dev_get_drvdata(dev); release_dma_channels(this); return 0; } static int gpmi_pm_resume(struct device *dev) { struct gpmi_nand_data *this = dev_get_drvdata(dev); int ret; ret = acquire_dma_channels(this); if (ret < 0) return ret; /* re-init the GPMI registers */ this->flags &= ~GPMI_TIMING_INIT_OK; ret = gpmi_init(this); if (ret) { dev_err(this->dev, "Error setting GPMI : %d\n", ret); return ret; } /* re-init the BCH registers */ ret = bch_set_geometry(this); if (ret) { dev_err(this->dev, "Error setting BCH : %d\n", ret); return ret; } /* re-init others */ gpmi_extra_init(this); return 0; } #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops gpmi_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(gpmi_pm_suspend, gpmi_pm_resume) }; static struct platform_driver gpmi_nand_driver = { .driver = { .name = "gpmi-nand", .pm = &gpmi_pm_ops, .of_match_table = gpmi_nand_id_table, }, .probe = gpmi_nand_probe, Loading
drivers/mtd/nand/mpc5121_nfc.c +2 −5 Original line number Diff line number Diff line Loading @@ -626,7 +626,7 @@ static void mpc5121_nfc_free(struct device *dev, struct mtd_info *mtd) static int mpc5121_nfc_probe(struct platform_device *op) { struct device_node *rootnode, *dn = op->dev.of_node; struct device_node *dn = op->dev.of_node; struct clk *clk; struct device *dev = &op->dev; struct mpc5121_nfc_prv *prv; Loading Loading @@ -712,18 +712,15 @@ static int mpc5121_nfc_probe(struct platform_device *op) chip->ecc.mode = NAND_ECC_SOFT; /* Support external chip-select logic on ADS5121 board */ rootnode = of_find_node_by_path("/"); if (of_device_is_compatible(rootnode, "fsl,mpc5121ads")) { if (of_machine_is_compatible("fsl,mpc5121ads")) { retval = ads5121_chipselect_init(mtd); if (retval) { dev_err(dev, "Chipselect init error!\n"); of_node_put(rootnode); return retval; } chip->select_chip = ads5121_select_chip; } of_node_put(rootnode); /* Enable NFC clock */ clk = devm_clk_get(dev, "ipg"); Loading
drivers/mtd/nand/nand_bbt.c +0 −2 Original line number Diff line number Diff line Loading @@ -1373,5 +1373,3 @@ int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs) return ret; } EXPORT_SYMBOL(nand_scan_bbt);