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Commit b32c44b9 authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Simon Horman
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clk: shmobile: Add r8a7740, sh73a0 SoCs to MSTP bindings 



Signed-off-by: default avatarUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 8de078f1

Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt

+2 −0
Original line number Diff line number Diff line
@@ -11,9 +11,11 @@ Required Properties: 


  - compatible: Must be one of the following

    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks

    - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks

    - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks

    - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks

    - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks

    - "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks

    - "renesas,cpg-mstp-clock" for generic MSTP gate clocks

  - reg: Base address and length of the I/O mapped registers used by the MSTP

    clocks. The first register is the clock control register and is mandatory.