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Commit b23998ca authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add cpu dmips capacity for qcs405"

parents a79aff1b 71f6efba

arch/arm64/boot/dts/qcom/qcs405-cpu.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x100>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;
@@ -66,6 +67,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x101>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;
@@ -84,6 +86,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x102>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;
@@ -102,6 +105,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x103>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;