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Commit b1d05be6 authored by Cyril Chemparathy's avatar Cyril Chemparathy Committed by Kevin Hilman
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davinci: use divide ratio limits from pll_data 



This patch modifies the sysclk rate setting code to use the divider mask
specified in pll_data.  Without this, devices with different divider ranges
(e.g. tnetv107x) fail.

Signed-off-by: default avatarCyril Chemparathy <cyril@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 6d1c57c8

arch/arm/mach-davinci/clock.c

+2 −2
Original line number Diff line number Diff line
@@ -336,7 +336,7 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate) 
		ratio--;

	}



	if (ratio > PLLDIV_RATIO_MASK)

	if (ratio > pll->div_ratio_mask)

		return -EINVAL;



	do {
@@ -344,7 +344,7 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate) 
	} while (v & PLLSTAT_GOSTAT);



	v = __raw_readl(pll->base + clk->div_reg);

	v &= ~PLLDIV_RATIO_MASK;

	v &= ~pll->div_ratio_mask;

	v |= ratio | PLLDIV_EN;

	__raw_writel(v, pll->base + clk->div_reg);