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Commit b156fb29 authored by Shashank Babu Chinta Venkata's avatar Shashank Babu Chinta Venkata Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add displays for 1080p panel for SDM855 



Add FHD displays for truly 1080p panel in video mode and
command mode for SDM855.

Change-Id: I813d007e06aaba554f82988de9d459439c6db037
Signed-off-by: default avatarShashank Babu Chinta Venkata <sbchin@codeaurora.org>
parent f9de09d6

arch/arm64/boot/dts/qcom/sdm855-sde-display.dtsi

+78 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ 
#include "dsi-panel-nt35597-truly-dualmipi-wqxga-cmd.dtsi"

#include "dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi"

#include "dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi"

#include "dsi-panel-nt35695b-truly-fhd-video.dtsi"

#include "dsi-panel-nt35695b-truly-fhd-cmd.dtsi"

#include "dsi-panel-sharp-1080p-cmd.dtsi"

#include "dsi-panel-sharp-dualmipi-1080p-120hz.dtsi"

#include "dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi"
@@ -426,6 +428,56 @@ 
		vddio-supply = <&pm855_l14>;

	};



	dsi_nt35695b_truly_fhd_cmd_display: qcom,dsi-display@15 {

		compatible = "qcom,dsi-display";

		label = "dsi_nt35695b_truly_fhd_cmd_display";

		qcom,display-type = "primary";



		qcom,dsi-ctrl = <&mdss_dsi0>;

		qcom,dsi-phy = <&mdss_dsi_phy0>;

		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,

			<&mdss_dsi0_pll PCLK_MUX_0_CLK>;

		clock-names = "src_byte_clk", "src_pixel_clk";



		pinctrl-names = "panel_active", "panel_suspend";

		pinctrl-0 = <&sde_dsi_active &sde_te_active>;

		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		qcom,platform-te-gpio = <&tlmm 8 0>;

		qcom,platform-reset-gpio = <&tlmm 6 0>;

		qcom,panel-mode-gpio = <&tlmm 7 0>;



		qcom,dsi-panel = <&dsi_nt35695b_truly_fhd_cmd>;



		vddio-supply = <&pm855_l14>;

		lab-supply = <&lcdb_ldo_vreg>;

		ibb-supply = <&lcdb_ncp_vreg>;

	};



	dsi_nt35695b_truly_fhd_video_display: qcom,dsi-display@16 {

		compatible = "qcom,dsi-display";

		label = "dsi_nt35695b_truly_fhd_video_display";

		qcom,display-type = "primary";



		qcom,dsi-ctrl = <&mdss_dsi0>;

		qcom,dsi-phy = <&mdss_dsi_phy0>;

		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,

			<&mdss_dsi0_pll PCLK_MUX_0_CLK>;

		clock-names = "src_byte_clk", "src_pixel_clk";



		pinctrl-names = "panel_active", "panel_suspend";

		pinctrl-0 = <&sde_dsi_active &sde_te_active>;

		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		qcom,platform-te-gpio = <&tlmm 8 0>;

		qcom,platform-reset-gpio = <&tlmm 6 0>;

		qcom,panel-mode-gpio = <&tlmm 7 0>;



		qcom,dsi-panel = <&dsi_nt35695b_truly_fhd_video>;



		vddio-supply = <&pm855_l14>;

		lab-supply = <&lcdb_ldo_vreg>;

		ibb-supply = <&lcdb_ncp_vreg>;

	};



	sde_wb: qcom,wb-display@0 {

		compatible = "qcom,wb-display";

		cell-index = <0>;
@@ -540,6 +592,32 @@ 
	};

};



&dsi_nt35695b_truly_fhd_video {

	qcom,mdss-dsi-t-clk-post = <0x17>;

	qcom,mdss-dsi-t-clk-pre = <0x19>;

	qcom,mdss-dsi-display-timings {

		timing@0 {

			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22

				08 08 05 03 04 00 19 17];

			qcom,display-topology = <1 0 1>;

			qcom,default-topology-index = <0>;

		};

	};

};



&dsi_nt35695b_truly_fhd_cmd {

	qcom,mdss-dsi-t-clk-post = <0x17>;

	qcom,mdss-dsi-t-clk-pre = <0x19>;

	qcom,mdss-dsi-display-timings {

		timing@0 {

			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22

				08 08 05 03 04 00 19 17];

			qcom,display-topology = <1 0 1>;

			qcom,default-topology-index = <0>;

		};

	};

};



&dsi_dual_sharp_1080_120hz_cmd {

	qcom,mdss-dsi-t-clk-post = <0x0f>;

	qcom,mdss-dsi-t-clk-pre = <0x36>;