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Commit b1508561 authored by Russell King's avatar Russell King Committed by Herbert Xu
Browse files

crypto: marvell/cesa - use readl_relaxed()/writel_relaxed()



Use relaxed IO accessors where appropriate.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 659f313d
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+1 −1
Original line number Diff line number Diff line
@@ -677,7 +677,7 @@ static inline void mv_cesa_set_int_mask(struct mv_cesa_engine *engine,
	if (int_mask == engine->int_mask)
		return;

	writel(int_mask, engine->regs + CESA_SA_INT_MSK);
	writel_relaxed(int_mask, engine->regs + CESA_SA_INT_MSK);
	engine->int_mask = int_mask;
}

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ static void mv_cesa_ablkcipher_std_step(struct ablkcipher_request *req)
	}

	mv_cesa_set_int_mask(engine, CESA_SA_INT_ACCEL0_DONE);
	writel(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
	writel_relaxed(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
	writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
}

+3 −4
Original line number Diff line number Diff line
@@ -281,7 +281,7 @@ static void mv_cesa_ahash_std_step(struct ahash_request *req)
	creq->cache_ptr = new_cache_ptr;

	mv_cesa_set_int_mask(engine, CESA_SA_INT_ACCEL0_DONE);
	writel(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
	writel_relaxed(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
	writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
}

@@ -344,7 +344,7 @@ static int mv_cesa_ahash_process(struct crypto_async_request *req, u32 status)

	digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(ahashreq));
	for (i = 0; i < digsize / 4; i++)
		creq->state[i] = readl(engine->regs + CESA_IVDIG(i));
		creq->state[i] = readl_relaxed(engine->regs + CESA_IVDIG(i));

	if (creq->cache_ptr)
		sg_pcopy_to_buffer(ahashreq->src, creq->src_nents,
@@ -390,8 +390,7 @@ static void mv_cesa_ahash_prepare(struct crypto_async_request *req,

	digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(ahashreq));
	for (i = 0; i < digsize / 4; i++)
		writel(creq->state[i],
		       engine->regs + CESA_IVDIG(i));
		writel_relaxed(creq->state[i], engine->regs + CESA_IVDIG(i));
}

static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
+10 −10
Original line number Diff line number Diff line
@@ -41,17 +41,17 @@ void mv_cesa_dma_step(struct mv_cesa_tdma_req *dreq)
{
	struct mv_cesa_engine *engine = dreq->base.engine;

	writel(0, engine->regs + CESA_SA_CFG);
	writel_relaxed(0, engine->regs + CESA_SA_CFG);

	mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
	writel(CESA_TDMA_DST_BURST_128B | CESA_TDMA_SRC_BURST_128B |
	writel_relaxed(CESA_TDMA_DST_BURST_128B | CESA_TDMA_SRC_BURST_128B |
		       CESA_TDMA_NO_BYTE_SWAP | CESA_TDMA_EN,
		       engine->regs + CESA_TDMA_CONTROL);

	writel(CESA_SA_CFG_ACT_CH0_IDMA | CESA_SA_CFG_MULTI_PKT |
	writel_relaxed(CESA_SA_CFG_ACT_CH0_IDMA | CESA_SA_CFG_MULTI_PKT |
		       CESA_SA_CFG_CH0_W_IDMA | CESA_SA_CFG_PARA_DIS,
		       engine->regs + CESA_SA_CFG);
	writel(dreq->chain.first->cur_dma,
	writel_relaxed(dreq->chain.first->cur_dma,
		       engine->regs + CESA_TDMA_NEXT_ADDR);
	writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
}