drm/msm/dsi-staging: move misr caching to pre clk_off

Currently DSI ctrl MISR registers are read and cached
just before the regulator disable. Move it before clk
disable to avoid unclocked access.

Change-Id: Ica5c788c94bc1d90b76c17b55d0f610c60ac1917
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>