Commit b09aea7f authored Sep 19, 2009 by Zhenyu Wang Committed by Jesse Barnes Sep 17, 2009

drm/i915: Fix typo for wrong LVDS clock setting on IGDNG



New register for PCH LVDS on IGDNG should be used.
This is a copy-n-paste typo. This fixes possible dual
channel LVDS panel failure on IGDNG.

Cc: Stable Team <stable@kernel.org>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

parent 6f465a89

drivers/gpu/drm/i915/intel_display.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -877,7 +877,7 @@ intel_igdng_find_best_PLL(const intel_limit_t limit, struct drm_crtc crtc,
		refclk, best_clock);

		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
		if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
		if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
		LVDS_CLKB_POWER_UP)
		clock.p2 = limit->p2.p2_fast;
		else