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Commit b0610bb8 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

edac: use Documentation-nano format for some data structs 



No functional changes. Just comment improvements.

Reviewed-by: default avatarAristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent fd687502

include/linux/edac.h

+59 −23
Original line number Original line Diff line number Diff line
@@ -49,7 +49,19 @@ static inline void opstate_init(void) 
#define EDAC_MC_LABEL_LEN	31

#define EDAC_MC_LABEL_LEN	31

#define MC_PROC_NAME_MAX_LEN	7

#define MC_PROC_NAME_MAX_LEN	7





/* memory devices */

/**

 * enum dev_type - describe the type of memory DRAM chips used at the stick

 * @DEV_UNKNOWN:	Can't be determined, or MC doesn't support detect it

 * @DEV_X1:		1 bit for data

 * @DEV_X2:		2 bits for data

 * @DEV_X4:		4 bits for data

 * @DEV_X8:		8 bits for data

 * @DEV_X16:		16 bits for data

 * @DEV_X32:		32 bits for data

 * @DEV_X64:		64 bits for data

 *

 * Typical values are x4 and x8.

 */

enum dev_type {

enum dev_type {

	DEV_UNKNOWN = 0,

	DEV_UNKNOWN = 0,

	DEV_X1,

	DEV_X1,
@@ -167,18 +179,30 @@ enum mem_type { 
#define MEM_FLAG_DDR3		 BIT(MEM_DDR3)

#define MEM_FLAG_DDR3		 BIT(MEM_DDR3)

#define MEM_FLAG_RDDR3		 BIT(MEM_RDDR3)

#define MEM_FLAG_RDDR3		 BIT(MEM_RDDR3)





/* chipset Error Detection and Correction capabilities and mode */

/**

 * enum edac-type - Error Detection and Correction capabilities and mode

 * @EDAC_UNKNOWN:	Unknown if ECC is available

 * @EDAC_NONE:		Doesn't support ECC

 * @EDAC_RESERVED:	Reserved ECC type

 * @EDAC_PARITY:	Detects parity errors

 * @EDAC_EC:		Error Checking - no correction

 * @EDAC_SECDED:	Single bit error correction, Double detection

 * @EDAC_S2ECD2ED:	Chipkill x2 devices - do these exist?

 * @EDAC_S4ECD4ED:	Chipkill x4 devices

 * @EDAC_S8ECD8ED:	Chipkill x8 devices

 * @EDAC_S16ECD16ED:	Chipkill x16 devices

 */

enum edac_type {

enum edac_type {

	EDAC_UNKNOWN = 0,	/* Unknown if ECC is available */

	EDAC_UNKNOWN =	0,

	EDAC_NONE,		/* Doesn't support ECC */

	EDAC_NONE,

	EDAC_RESERVED,		/* Reserved ECC type */

	EDAC_RESERVED,

	EDAC_PARITY,		/* Detects parity errors */

	EDAC_PARITY,

	EDAC_EC,		/* Error Checking - no correction */

	EDAC_EC,

	EDAC_SECDED,		/* Single bit error correction, Double detection */

	EDAC_SECDED,

	EDAC_S2ECD2ED,		/* Chipkill x2 devices - do these exist? */

	EDAC_S2ECD2ED,

	EDAC_S4ECD4ED,		/* Chipkill x4 devices */

	EDAC_S4ECD4ED,

	EDAC_S8ECD8ED,		/* Chipkill x8 devices */

	EDAC_S8ECD8ED,

	EDAC_S16ECD16ED,	/* Chipkill x16 devices */

	EDAC_S16ECD16ED,

};

};





#define EDAC_FLAG_UNKNOWN	BIT(EDAC_UNKNOWN)

#define EDAC_FLAG_UNKNOWN	BIT(EDAC_UNKNOWN)
@@ -191,18 +215,30 @@ enum edac_type { 
#define EDAC_FLAG_S8ECD8ED	BIT(EDAC_S8ECD8ED)

#define EDAC_FLAG_S8ECD8ED	BIT(EDAC_S8ECD8ED)

#define EDAC_FLAG_S16ECD16ED	BIT(EDAC_S16ECD16ED)

#define EDAC_FLAG_S16ECD16ED	BIT(EDAC_S16ECD16ED)





/* scrubbing capabilities */

/**

 * enum scrub_type - scrubbing capabilities

 * @SCRUB_UNKNOWN		Unknown if scrubber is available

 * @SCRUB_NONE:			No scrubber

 * @SCRUB_SW_PROG:		SW progressive (sequential) scrubbing

 * @SCRUB_SW_SRC:		Software scrub only errors

 * @SCRUB_SW_PROG_SRC:		Progressive software scrub from an error

 * @SCRUB_SW_TUNABLE:		Software scrub frequency is tunable

 * @SCRUB_HW_PROG:		HW progressive (sequential) scrubbing

 * @SCRUB_HW_SRC:		Hardware scrub only errors

 * @SCRUB_HW_PROG_SRC:		Progressive hardware scrub from an error

 * SCRUB_HW_TUNABLE:		Hardware scrub frequency is tunable

 */

enum scrub_type {

enum scrub_type {

	SCRUB_UNKNOWN = 0,	/* Unknown if scrubber is available */

	SCRUB_UNKNOWN =	0,

	SCRUB_NONE,		/* No scrubber */

	SCRUB_NONE,

	SCRUB_SW_PROG,		/* SW progressive (sequential) scrubbing */

	SCRUB_SW_PROG,

	SCRUB_SW_SRC,		/* Software scrub only errors */

	SCRUB_SW_SRC,

	SCRUB_SW_PROG_SRC,	/* Progressive software scrub from an error */

	SCRUB_SW_PROG_SRC,

	SCRUB_SW_TUNABLE,	/* Software scrub frequency is tunable */

	SCRUB_SW_TUNABLE,

	SCRUB_HW_PROG,		/* HW progressive (sequential) scrubbing */

	SCRUB_HW_PROG,

	SCRUB_HW_SRC,		/* Hardware scrub only errors */

	SCRUB_HW_SRC,

	SCRUB_HW_PROG_SRC,	/* Progressive hardware scrub from an error */

	SCRUB_HW_PROG_SRC,

	SCRUB_HW_TUNABLE	/* Hardware scrub frequency is tunable */

	SCRUB_HW_TUNABLE

};

};





#define SCRUB_FLAG_SW_PROG	BIT(SCRUB_SW_PROG)

#define SCRUB_FLAG_SW_PROG	BIT(SCRUB_SW_PROG)