Loading sound/soc/codecs/wm8750.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -789,7 +789,7 @@ static int __devexit wm8750_spi_remove(struct spi_device *spi) static const struct spi_device_id wm8750_spi_ids[] = { static const struct spi_device_id wm8750_spi_ids[] = { { "wm8750", 0 }, { "wm8750", 0 }, { "wm8987", 0 }, { "wm8987", 0 }, { 0, 0 }, { }, }; }; MODULE_DEVICE_TABLE(spi, wm8750_spi_ids); MODULE_DEVICE_TABLE(spi, wm8750_spi_ids); Loading sound/soc/codecs/wm8962.c +4 −4 Original line number Original line Diff line number Diff line Loading @@ -2927,10 +2927,6 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec, WM8962_BIAS_ENA | 0x180); WM8962_BIAS_ENA | 0x180); msleep(5); msleep(5); snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); } } /* VMID 2*250k */ /* VMID 2*250k */ Loading Loading @@ -3868,6 +3864,10 @@ static int wm8962_probe(struct snd_soc_codec *codec) */ */ snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); /* Ensure we have soft control over all registers */ snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); if (pdata) { if (pdata) { Loading Loading
sound/soc/codecs/wm8750.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -789,7 +789,7 @@ static int __devexit wm8750_spi_remove(struct spi_device *spi) static const struct spi_device_id wm8750_spi_ids[] = { static const struct spi_device_id wm8750_spi_ids[] = { { "wm8750", 0 }, { "wm8750", 0 }, { "wm8987", 0 }, { "wm8987", 0 }, { 0, 0 }, { }, }; }; MODULE_DEVICE_TABLE(spi, wm8750_spi_ids); MODULE_DEVICE_TABLE(spi, wm8750_spi_ids); Loading
sound/soc/codecs/wm8962.c +4 −4 Original line number Original line Diff line number Diff line Loading @@ -2927,10 +2927,6 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec, WM8962_BIAS_ENA | 0x180); WM8962_BIAS_ENA | 0x180); msleep(5); msleep(5); snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); } } /* VMID 2*250k */ /* VMID 2*250k */ Loading Loading @@ -3868,6 +3864,10 @@ static int wm8962_probe(struct snd_soc_codec *codec) */ */ snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); /* Ensure we have soft control over all registers */ snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); if (pdata) { if (pdata) { Loading