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Commit af70fdc9 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'marco-timer-cleanup-rebase' of... 

Merge branch 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc

From Barry Song, this adds support for a new SoC from CSR; marco. It's
SMP, uses GIC instead of VIC and in general needs a bit of rework of
the platform code for setup, which this branch contains.

* 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel

:
  ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
  ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
  ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
  ARM: PRIMA2: rtciobg: it is also compatible with marco
  ARM: PRIMA2: rstc: enable the support for Marco
  ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
  ARM: PRIMA2: initialize l2x0 according to mach from DT
  ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
  ARM: PRIMA2: add CSR SiRFmarco device tree .dts

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 66eae035 7f46a107

Documentation/devicetree/bindings/arm/sirf.txt

+8 −2
Original line number Diff line number Diff line 
prima2 "cb" evaluation board

CSR SiRFprimaII and SiRFmarco device tree bindings.

========================================



Required root node properties:

    - compatible = "sirf,prima2-cb", "sirf,prima2";
 
    - compatible:

    - "sirf,prima2-cb" : prima2 "cb" evaluation board

    - "sirf,marco-cb" : marco "cb" evaluation board

    - "sirf,prima2" : prima2 device based board

    - "sirf,marco" : marco device based board

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -393,6 +393,7 @@ config ARCH_GEMINI 
config ARCH_SIRF

	bool "CSR SiRF"

	select ARCH_REQUIRE_GPIOLIB

	select AUTO_ZRELADDR

	select COMMON_CLK

	select GENERIC_CLOCKEVENTS

	select GENERIC_IRQ_CHIP

arch/arm/Kconfig.debug

+14 −0
Original line number Diff line number Diff line
@@ -386,6 +386,20 @@ choice 
		  Say Y here if you want kernel low-level debugging support

		  on Tegra based platforms.



	config DEBUG_SIRFPRIMA2_UART1

		bool "Kernel low-level debugging messages via SiRFprimaII UART1"

		depends on ARCH_PRIMA2

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the uart1 port on SiRFprimaII devices.



	config DEBUG_SIRFMARCO_UART1

		bool "Kernel low-level debugging messages via SiRFmarco UART1"

		depends on ARCH_MARCO

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the uart1 port on SiRFmarco devices.



	config DEBUG_VEXPRESS_UART0_DETECT

		bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"

		depends on ARCH_VEXPRESS && CPU_CP15_MMU

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -73,6 +73,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ 
	kirkwood-ts219-6281.dtb \

	kirkwood-ts219-6282.dtb \

	kirkwood-openblocks_a6.dtb

dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb

dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \

	msm8960-cdp.dtb

dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \

arch/arm/boot/dts/marco-evb.dts

0 → 100644
+54 −0
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/*

 * DTS file for CSR SiRFmarco Evaluation Board

 *

 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.

 *

 * Licensed under GPLv2 or later.

 */



/dts-v1/;



/include/ "marco.dtsi"



/ {

	model = "CSR SiRFmarco Evaluation Board";

	compatible = "sirf,marco-cb", "sirf,marco";



	memory {

		reg = <0x40000000 0x60000000>;

	};



	axi {

		peri-iobg {

			uart1: uart@cc060000 {

				status = "okay";

			};

			uart2: uart@cc070000 {

				status = "okay";

			};

			i2c0: i2c@cc0e0000 {

			      status = "okay";

			      fpga-cpld@4d {

				      compatible = "sirf,fpga-cpld";

				      reg = <0x4d>;

			      };

			};

			spi1: spi@cc170000 {

				status = "okay";

				pinctrl-names = "default";

				pinctrl-0 = <&spi1_pins_a>;

				spi@0 {

					compatible = "spidev";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};

			pci-iobg {

				sd0: sdhci@cd000000 {

					bus-width = <8>;

					status = "okay";

				};

			};

		};

	};

};