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Commit af1afc29 authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 

ath.git patches for 4.9. Major changes:

ath10k

* add nl80211 testmode support for 10.4 firmware
* hide kernel addresses from logs using %pK format specifier
* implement NAPI support
* enable peer stats by default

ath9k

* use ieee80211_tx_status_noskb where possible

wil6210

* extract firmware capabilities from the firmware file

ath6kl

* enable firmware crash dumps on the AR6004

ath-current is also merged to fix a conflict in ath10k.
parents 75696fe7 95b5bf7c

drivers/net/wireless/ath/ath10k/ahb.c

+8 −4
Original line number Diff line number Diff line
@@ -462,13 +462,13 @@ static void ath10k_ahb_halt_chip(struct ath10k *ar) 
static irqreturn_t ath10k_ahb_interrupt_handler(int irq, void *arg)

{

	struct ath10k *ar = arg;

	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);



	if (!ath10k_pci_irq_pending(ar))

		return IRQ_NONE;



	ath10k_pci_disable_and_clear_legacy_irq(ar);

	tasklet_schedule(&ar_pci->intr_tq);

	ath10k_pci_irq_msi_fw_mask(ar);

	napi_schedule(&ar->napi);



	return IRQ_HANDLED;

}
@@ -577,7 +577,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar) 


	ath10k_dbg(ar, ATH10K_DBG_BOOT, "irq: %d\n", ar_ahb->irq);



	ath10k_dbg(ar, ATH10K_DBG_BOOT, "mem: 0x%p mem_len: %lu gcc mem: 0x%p tcsr_mem: 0x%p\n",

	ath10k_dbg(ar, ATH10K_DBG_BOOT, "mem: 0x%pK mem_len: %lu gcc mem: 0x%pK tcsr_mem: 0x%pK\n",

		   ar_ahb->mem, ar_ahb->mem_len,

		   ar_ahb->gcc_mem, ar_ahb->tcsr_mem);

	return 0;
@@ -717,6 +717,9 @@ static void ath10k_ahb_hif_stop(struct ath10k *ar) 
	synchronize_irq(ar_ahb->irq);



	ath10k_pci_flush(ar);



	napi_synchronize(&ar->napi);

	napi_disable(&ar->napi);

}



static int ath10k_ahb_hif_power_up(struct ath10k *ar)
@@ -748,6 +751,7 @@ static int ath10k_ahb_hif_power_up(struct ath10k *ar) 
		ath10k_err(ar, "could not wake up target CPU: %d\n", ret);

		goto err_ce_deinit;

	}

	napi_enable(&ar->napi);



	return 0;
@@ -831,7 +835,7 @@ static int ath10k_ahb_probe(struct platform_device *pdev) 
		goto err_resource_deinit;

	}



	ath10k_pci_init_irq_tasklets(ar);

	ath10k_pci_init_napi(ar);



	ret = ath10k_ahb_request_irq_legacy(ar);

	if (ret)

drivers/net/wireless/ath/ath10k/bmi.c

+2 −2
Original line number Diff line number Diff line
@@ -221,7 +221,7 @@ int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length) 
	u32 txlen;

	int ret;



	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%p length %d\n",

	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%pK length %d\n",

		   buffer, length);



	if (ar->bmi.done_sent) {
@@ -287,7 +287,7 @@ int ath10k_bmi_fast_download(struct ath10k *ar, 
	int ret;



	ath10k_dbg(ar, ATH10K_DBG_BMI,

		   "bmi fast download address 0x%x buffer 0x%p length %d\n",

		   "bmi fast download address 0x%x buffer 0x%pK length %d\n",

		   address, buffer, length);



	ret = ath10k_bmi_lz_stream_start(ar, address);

drivers/net/wireless/ath/ath10k/ce.c

+2 −2
Original line number Diff line number Diff line
@@ -840,7 +840,7 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar, 
	ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, nentries);



	ath10k_dbg(ar, ATH10K_DBG_BOOT,

		   "boot init ce src ring id %d entries %d base_addr %p\n",

		   "boot init ce src ring id %d entries %d base_addr %pK\n",

		   ce_id, nentries, src_ring->base_addr_owner_space);



	return 0;
@@ -874,7 +874,7 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar, 
	ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, nentries);



	ath10k_dbg(ar, ATH10K_DBG_BOOT,

		   "boot ce dest ring id %d entries %d base_addr %p\n",

		   "boot ce dest ring id %d entries %d base_addr %pK\n",

		   ce_id, nentries, dest_ring->base_addr_owner_space);



	return 0;

drivers/net/wireless/ath/ath10k/core.c

+103 −22
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,

		.cal_data_len = 2116,

		.fw = {

			.dir = QCA988X_HW_2_0_FW_DIR,
@@ -68,6 +67,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA988X_BOARD_DATA_SZ,

			.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA9887_HW_1_0_VERSION,
@@ -79,7 +79,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,

		.cal_data_len = 2116,

		.fw = {

			.dir = QCA9887_HW_1_0_FW_DIR,
@@ -87,6 +86,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA9887_BOARD_DATA_SZ,

			.board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA6174_HW_2_1_VERSION,
@@ -104,6 +104,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA6174_HW_2_1_VERSION,
@@ -114,7 +115,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,

		.cal_data_len = 8124,

		.fw = {

			.dir = QCA6174_HW_2_1_FW_DIR,
@@ -122,6 +122,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA6174_HW_3_0_VERSION,
@@ -132,7 +133,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,

		.cal_data_len = 8124,

		.fw = {

			.dir = QCA6174_HW_3_0_FW_DIR,
@@ -140,6 +140,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA6174_HW_3_2_VERSION,
@@ -150,7 +151,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,

		.cal_data_len = 8124,

		.fw = {

			/* uses same binaries as hw3.0 */
@@ -159,6 +159,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -171,7 +172,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.cck_rate_map_rev2 = true,

		.channel_counters_freq_hz = 150000,

		.max_probe_resp_desc_thres = 24,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,

		.tx_chain_mask = 0xf,

		.rx_chain_mask = 0xf,

		.max_spatial_stream = 4,
@@ -182,6 +182,8 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA99X0_BOARD_DATA_SZ,

			.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,

		},

		.sw_decrypt_mcast_mgmt = true,

		.hw_ops = &qca99x0_ops,

	},

	{

		.id = QCA9984_HW_1_0_DEV_VERSION,
@@ -194,7 +196,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.cck_rate_map_rev2 = true,

		.channel_counters_freq_hz = 150000,

		.max_probe_resp_desc_thres = 24,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,

		.tx_chain_mask = 0xf,

		.rx_chain_mask = 0xf,

		.max_spatial_stream = 4,
@@ -205,6 +206,8 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA99X0_BOARD_DATA_SZ,

			.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,

		},

		.sw_decrypt_mcast_mgmt = true,

		.hw_ops = &qca99x0_ops,

	},

	{

		.id = QCA9888_HW_2_0_DEV_VERSION,
@@ -216,7 +219,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.continuous_frag_desc = true,

		.channel_counters_freq_hz = 150000,

		.max_probe_resp_desc_thres = 24,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,

		.tx_chain_mask = 3,

		.rx_chain_mask = 3,

		.max_spatial_stream = 2,
@@ -227,6 +229,8 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA99X0_BOARD_DATA_SZ,

			.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,

		},

		.sw_decrypt_mcast_mgmt = true,

		.hw_ops = &qca99x0_ops,

	},

	{

		.id = QCA9377_HW_1_0_DEV_VERSION,
@@ -244,6 +248,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA9377_BOARD_DATA_SZ,

			.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA9377_HW_1_1_DEV_VERSION,
@@ -261,6 +266,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA9377_BOARD_DATA_SZ,

			.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,

		},

		.hw_ops = &qca988x_ops,

	},

	{

		.id = QCA4019_HW_1_0_DEV_VERSION,
@@ -274,7 +280,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.cck_rate_map_rev2 = true,

		.channel_counters_freq_hz = 125000,

		.max_probe_resp_desc_thres = 24,

		.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,

		.tx_chain_mask = 0x3,

		.rx_chain_mask = 0x3,

		.max_spatial_stream = 2,
@@ -285,6 +290,8 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_size = QCA4019_BOARD_DATA_SZ,

			.board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,

		},

		.sw_decrypt_mcast_mgmt = true,

		.hw_ops = &qca99x0_ops,

	},

};
@@ -304,6 +311,7 @@ static const char *const ath10k_core_fw_feature_str[] = { 
	[ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",

	[ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",

	[ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",

	[ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",

};



static unsigned int ath10k_core_get_fw_feature_str(char *buf,
@@ -699,7 +707,7 @@ static int ath10k_download_and_run_otp(struct ath10k *ar) 


	if (!ar->running_fw->fw_file.otp_data ||

	    !ar->running_fw->fw_file.otp_len) {

		ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",

		ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",

			    ar->running_fw->fw_file.otp_data,

			    ar->running_fw->fw_file.otp_len);

		return 0;
@@ -745,7 +753,7 @@ static int ath10k_download_fw(struct ath10k *ar) 
	data = ar->running_fw->fw_file.firmware_data;

	data_len = ar->running_fw->fw_file.firmware_len;



	ret = ath10k_swap_code_seg_configure(ar);

	ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);

	if (ret) {

		ath10k_err(ar, "failed to configure fw code swap: %d\n",

			   ret);
@@ -753,7 +761,7 @@ static int ath10k_download_fw(struct ath10k *ar) 
	}



	ath10k_dbg(ar, ATH10K_DBG_BOOT,

		   "boot uploading firmware image %p len %d\n",

		   "boot uploading firmware image %pK len %d\n",

		   data, data_len);



	ret = ath10k_bmi_fast_download(ar, address, data, data_len);
@@ -787,7 +795,7 @@ static void ath10k_core_free_firmware_files(struct ath10k *ar) 
	if (!IS_ERR(ar->pre_cal_file))

		release_firmware(ar->pre_cal_file);



	ath10k_swap_code_seg_release(ar);

	ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);



	ar->normal_mode_fw.fw_file.otp_data = NULL;

	ar->normal_mode_fw.fw_file.otp_len = 0;
@@ -1497,14 +1505,14 @@ static void ath10k_core_restart(struct work_struct *work) 


	ieee80211_stop_queues(ar->hw);

	ath10k_drain_tx(ar);

	complete_all(&ar->scan.started);

	complete_all(&ar->scan.completed);

	complete_all(&ar->scan.on_channel);

	complete_all(&ar->offchan_tx_completed);

	complete_all(&ar->install_key_done);

	complete_all(&ar->vdev_setup_done);

	complete_all(&ar->thermal.wmi_sync);

	complete_all(&ar->bss_survey_done);

	complete(&ar->scan.started);

	complete(&ar->scan.completed);

	complete(&ar->scan.on_channel);

	complete(&ar->offchan_tx_completed);

	complete(&ar->install_key_done);

	complete(&ar->vdev_setup_done);

	complete(&ar->thermal.wmi_sync);

	complete(&ar->bss_survey_done);

	wake_up(&ar->htt.empty_tx_wq);

	wake_up(&ar->wmi.tx_credits_wq);

	wake_up(&ar->peer_mapping_wq);
@@ -1705,6 +1713,55 @@ static int ath10k_core_init_firmware_features(struct ath10k *ar) 
	return 0;

}



static int ath10k_core_reset_rx_filter(struct ath10k *ar)

{

	int ret;

	int vdev_id;

	int vdev_type;

	int vdev_subtype;

	const u8 *vdev_addr;



	vdev_id = 0;

	vdev_type = WMI_VDEV_TYPE_STA;

	vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);

	vdev_addr = ar->mac_addr;



	ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,

				     vdev_addr);

	if (ret) {

		ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);

		return ret;

	}



	ret = ath10k_wmi_vdev_delete(ar, vdev_id);

	if (ret) {

		ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);

		return ret;

	}



	/* WMI and HTT may use separate HIF pipes and are not guaranteed to be

	 * serialized properly implicitly.

	 *

	 * Moreover (most) WMI commands have no explicit acknowledges. It is

	 * possible to infer it implicitly by poking firmware with echo

	 * command - getting a reply means all preceding comments have been

	 * (mostly) processed.

	 *

	 * In case of vdev create/delete this is sufficient.

	 *

	 * Without this it's possible to end up with a race when HTT Rx ring is

	 * started before vdev create/delete hack is complete allowing a short

	 * window of opportunity to receive (and Tx ACK) a bunch of frames.

	 */

	ret = ath10k_wmi_barrier(ar);

	if (ret) {

		ath10k_err(ar, "failed to ping firmware: %d\n", ret);

		return ret;

	}



	return 0;

}



int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,

		      const struct ath10k_fw_components *fw)

{
@@ -1872,6 +1929,25 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 
		goto err_hif_stop;

	}



	/* Some firmware revisions do not properly set up hardware rx filter

	 * registers.

	 *

	 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK

	 * is filled with 0s instead of 1s allowing HW to respond with ACKs to

	 * any frames that matches MAC_PCU_RX_FILTER which is also

	 * misconfigured to accept anything.

	 *

	 * The ADDR1 is programmed using internal firmware structure field and

	 * can't be (easily/sanely) reached from the driver explicitly. It is

	 * possible to implicitly make it correct by creating a dummy vdev and

	 * then deleting it.

	 */

	status = ath10k_core_reset_rx_filter(ar);

	if (status) {

		ath10k_err(ar, "failed to reset rx filter: %d\n", status);

		goto err_hif_stop;

	}



	/* If firmware indicates Full Rx Reorder support it must be used in a

	 * slightly different manner. Let HTT code know.

	 */
@@ -2031,7 +2107,7 @@ static int ath10k_core_probe_fw(struct ath10k *ar) 
		goto err_free_firmware_files;

	}



	ret = ath10k_swap_code_seg_init(ar);

	ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);

	if (ret) {

		ath10k_err(ar, "failed to initialize code swap segment: %d\n",

			   ret);
@@ -2072,6 +2148,9 @@ static void ath10k_core_register_work(struct work_struct *work) 
	struct ath10k *ar = container_of(work, struct ath10k, register_work);

	int status;



	/* peer stats are enabled by default */

	set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);



	status = ath10k_core_probe_fw(ar);

	if (status) {

		ath10k_err(ar, "could not probe fw (%d)\n", status);
@@ -2249,6 +2328,8 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 
	INIT_WORK(&ar->register_work, ath10k_core_register_work);

	INIT_WORK(&ar->restart_work, ath10k_core_restart);



	init_dummy_netdev(&ar->napi_dev);



	ret = ath10k_debug_create(ar);

	if (ret)

		goto err_free_aux_wq;

drivers/net/wireless/ath/ath10k/core.h

+27 −52
Original line number Diff line number Diff line
@@ -65,6 +65,10 @@ 
#define ATH10K_KEEPALIVE_MAX_IDLE 3895

#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900



/* NAPI poll budget */

#define ATH10K_NAPI_BUDGET      64

#define ATH10K_NAPI_QUOTA_LIMIT 60



struct ath10k;



enum ath10k_bus {
@@ -142,6 +146,7 @@ struct ath10k_wmi { 
	enum ath10k_htc_ep_id eid;

	struct completion service_ready;

	struct completion unified_ready;

	struct completion barrier;

	wait_queue_head_t tx_credits_wq;

	DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);

	struct wmi_cmd_map *cmd;
@@ -440,7 +445,7 @@ struct ath10k_debug { 
	struct completion tpc_complete;



	/* protected by conf_mutex */

	u32 fw_dbglog_mask;

	u64 fw_dbglog_mask;

	u32 fw_dbglog_level;

	u32 pktlog_filter;

	u32 reg_addr;
@@ -551,6 +556,13 @@ enum ath10k_fw_features { 
	 */

	ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,



	/* Older firmware with HTT delivers incorrect tx status for null func

	 * frames to driver, but this fixed in 10.2 and 10.4 firmware versions.

	 * Also this workaround results in reporting of incorrect null func

	 * status for 10.4. This flag is used to skip the workaround.

	 */

	ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,



	/* keep last */

	ATH10K_FW_FEATURE_COUNT,

};
@@ -663,6 +675,15 @@ struct ath10k_fw_file { 


	const void *codeswap_data;

	size_t codeswap_len;



	/* The original idea of struct ath10k_fw_file was that it only

	 * contains struct firmware and pointers to various parts (actual

	 * firmware binary, otp, metadata etc) of the file. This seg_info

	 * is actually created separate but as this is used similarly as

	 * the other firmware components it's more convenient to have it

	 * here.

	 */

	struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;

};



struct ath10k_fw_components {
@@ -715,53 +736,7 @@ struct ath10k { 
	struct ath10k_htc htc;

	struct ath10k_htt htt;



	struct ath10k_hw_params {

		u32 id;

		u16 dev_id;

		const char *name;

		u32 patch_load_addr;

		int uart_pin;

		u32 otp_exe_param;



		/* Type of hw cycle counter wraparound logic, for more info

		 * refer enum ath10k_hw_cc_wraparound_type.

		 */

		enum ath10k_hw_cc_wraparound_type cc_wraparound_type;



		/* Some of chip expects fragment descriptor to be continuous

		 * memory for any TX operation. Set continuous_frag_desc flag

		 * for the hardware which have such requirement.

		 */

		bool continuous_frag_desc;



		/* CCK hardware rate table mapping for the newer chipsets

		 * like QCA99X0, QCA4019 got revised. The CCK h/w rate values

		 * are in a proper order with respect to the rate/preamble

		 */

		bool cck_rate_map_rev2;



		u32 channel_counters_freq_hz;



		/* Mgmt tx descriptors threshold for limiting probe response

		 * frames.

		 */

		u32 max_probe_resp_desc_thres;



		/* The padding bytes's location is different on various chips */

		enum ath10k_hw_4addr_pad hw_4addr_pad;



		u32 tx_chain_mask;

		u32 rx_chain_mask;

		u32 max_spatial_stream;

		u32 cal_data_len;



		struct ath10k_hw_params_fw {

			const char *dir;

			const char *board;

			size_t board_size;

			size_t board_ext_size;

		} fw;

	} hw_params;

	struct ath10k_hw_params hw_params;



	/* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */

	struct ath10k_fw_components normal_mode_fw;
@@ -774,10 +749,6 @@ struct ath10k { 
	const struct firmware *pre_cal_file;

	const struct firmware *cal_file;



	struct {

		struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;

	} swap;



	struct {

		u32 vendor;

		u32 device;
@@ -936,6 +907,10 @@ struct ath10k { 
	struct ath10k_thermal thermal;

	struct ath10k_wow wow;



	/* NAPI */

	struct net_device napi_dev;

	struct napi_struct napi;



	/* must be last */

	u8 drv_priv[0] __aligned(sizeof(void *));

};