Commit aed26fca authored Jan 30, 2016 by Chen-Yu Tsai Committed by Ulf Hansson Feb 29, 2016

mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support



Now that clock delay settings for 8 bit DDR are correct, and vqmmc
support is available, we can enable MMC_CAP_1_8V_DDR support. This
enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching
is not available.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

parent 2a7aa63a

drivers/mmc/host/sunxi-mmc.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
		mmc->f_min = 400000;
		mmc->f_max = 52000000;
		mmc->caps \|= MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED \|
		MMC_CAP_1_8V_DDR \|
		MMC_CAP_ERASE \| MMC_CAP_SDIO_IRQ;

		ret = mmc_of_parse(mmc);