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Commit ae9ae064 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Lennert Buytenhek
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mv643xx_eth: also check TX_IN_PROGRESS when disabling transmit path 



The recommended sequence for waiting for the transmit path to clear
after disabling all of the transmit queues is to wait for the
TX_FIFO_EMPTY bit in the Port Status register to become set as well
as the TX_IN_PROGRESS bit to clear.

Signed-off-by: default avatarLennert Buytenhek <buytenh@marvell.com>
parent 65193a91

drivers/net/mv643xx_eth.c

+8 −1
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ static char mv643xx_eth_driver_version[] = "1.1"; 
#define PORT_SERIAL_CONTROL(p)		(0x043c + ((p) << 10))

#define PORT_STATUS(p)			(0x0444 + ((p) << 10))

#define  TX_FIFO_EMPTY			0x00000400

#define  TX_IN_PROGRESS			0x00000080

#define TXQ_COMMAND(p)			(0x0448 + ((p) << 10))

#define TXQ_FIX_PRIO_CONF(p)		(0x044c + ((p) << 10))

#define TX_BW_RATE(p)			(0x0450 + ((p) << 10))
@@ -2039,8 +2040,14 @@ static void port_reset(struct mv643xx_eth_private *mp) 
		if (mp->txq_mask & (1 << i))

			txq_disable(mp->txq + i);

	}

	while (!(rdl(mp, PORT_STATUS(mp->port_num)) & TX_FIFO_EMPTY))



	while (1) {

		u32 ps = rdl(mp, PORT_STATUS(mp->port_num));



		if ((ps & (TX_IN_PROGRESS | TX_FIFO_EMPTY)) == TX_FIFO_EMPTY)

			break;

		udelay(10);

	}



	/* Reset the Enable bit in the Configuration Register */

	data = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num));