Loading drivers/gpu/drm/msm/sde/sde_hw_sspp.c +4 −2 Original line number Diff line number Diff line Loading @@ -259,7 +259,8 @@ static void _sspp_setup_csc10_opmode(struct sde_hw_pipe *ctx, * Setup source pixel format, flip, */ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx, const struct sde_format *fmt, u32 flags, const struct sde_format *fmt, bool blend_enabled, u32 flags, enum sde_sspp_multirect_index rect_mode) { struct sde_hw_blk_reg_map *c; Loading Loading @@ -328,7 +329,8 @@ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx, SDE_FETCH_CONFIG_RESET_VALUE | ctx->mdp->highest_bank_bit << 18); if (IS_UBWC_20_SUPPORTED(ctx->catalog->ubwc_version)) { fast_clear = fmt->alpha_enable ? BIT(31) : 0; fast_clear = (fmt->alpha_enable && blend_enabled) ? BIT(31) : 0; SDE_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL, fast_clear | (ctx->mdp->ubwc_swizzle) | (ctx->mdp->highest_bank_bit << 4)); Loading drivers/gpu/drm/msm/sde/sde_hw_sspp.h +4 −2 Original line number Diff line number Diff line Loading @@ -293,12 +293,14 @@ struct sde_hw_sspp_ops { /** * setup_format - setup pixel format cropping rectangle, flip * @ctx: Pointer to pipe context * @cfg: Pointer to pipe config structure * @fmt: Pointer to sde_format structure * @blend_enabled: flag indicating blend enabled or disabled on plane * @flags: Extra flags for format config * @index: rectangle index in multirect */ void (*setup_format)(struct sde_hw_pipe *ctx, const struct sde_format *fmt, u32 flags, const struct sde_format *fmt, bool blend_enabled, u32 flags, enum sde_sspp_multirect_index index); /** Loading drivers/gpu/drm/msm/sde/sde_plane.c +11 −2 Original line number Diff line number Diff line Loading @@ -1451,6 +1451,7 @@ static int _sde_plane_color_fill(struct sde_plane *psde, const struct sde_format *fmt; const struct drm_plane *plane; struct sde_plane_state *pstate; bool blend_enable = true; if (!psde || !psde->base.state) { SDE_ERROR("invalid plane\n"); Loading @@ -1473,6 +1474,9 @@ static int _sde_plane_color_fill(struct sde_plane *psde, */ fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888); blend_enable = (SDE_DRM_BLEND_OP_OPAQUE != sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)); /* update sspp */ if (fmt && psde->pipe_hw->ops.setup_solidfill) { psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw, Loading @@ -1488,7 +1492,7 @@ static int _sde_plane_color_fill(struct sde_plane *psde, if (psde->pipe_hw->ops.setup_format) psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, SDE_SSPP_SOLID_FILL, fmt, blend_enable, SDE_SSPP_SOLID_FILL, pstate->multirect_index); if (psde->pipe_hw->ops.setup_rects) Loading Loading @@ -3527,6 +3531,7 @@ static int sde_plane_sspp_atomic_update(struct drm_plane *plane, struct sde_rect src, dst; const struct sde_rect *crtc_roi; bool q16_data = true; bool blend_enabled = true; int idx; if (!plane) { Loading Loading @@ -3761,8 +3766,12 @@ static int sde_plane_sspp_atomic_update(struct drm_plane *plane, if (rstate->out_rotation & DRM_REFLECT_Y) src_flags |= SDE_SSPP_FLIP_UD; blend_enabled = (SDE_DRM_BLEND_OP_OPAQUE != sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)); /* update format */ psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, src_flags, psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, blend_enabled, src_flags, pstate->multirect_index); if (psde->pipe_hw->ops.setup_cdp) { Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_sspp.c +4 −2 Original line number Diff line number Diff line Loading @@ -259,7 +259,8 @@ static void _sspp_setup_csc10_opmode(struct sde_hw_pipe *ctx, * Setup source pixel format, flip, */ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx, const struct sde_format *fmt, u32 flags, const struct sde_format *fmt, bool blend_enabled, u32 flags, enum sde_sspp_multirect_index rect_mode) { struct sde_hw_blk_reg_map *c; Loading Loading @@ -328,7 +329,8 @@ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx, SDE_FETCH_CONFIG_RESET_VALUE | ctx->mdp->highest_bank_bit << 18); if (IS_UBWC_20_SUPPORTED(ctx->catalog->ubwc_version)) { fast_clear = fmt->alpha_enable ? BIT(31) : 0; fast_clear = (fmt->alpha_enable && blend_enabled) ? BIT(31) : 0; SDE_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL, fast_clear | (ctx->mdp->ubwc_swizzle) | (ctx->mdp->highest_bank_bit << 4)); Loading
drivers/gpu/drm/msm/sde/sde_hw_sspp.h +4 −2 Original line number Diff line number Diff line Loading @@ -293,12 +293,14 @@ struct sde_hw_sspp_ops { /** * setup_format - setup pixel format cropping rectangle, flip * @ctx: Pointer to pipe context * @cfg: Pointer to pipe config structure * @fmt: Pointer to sde_format structure * @blend_enabled: flag indicating blend enabled or disabled on plane * @flags: Extra flags for format config * @index: rectangle index in multirect */ void (*setup_format)(struct sde_hw_pipe *ctx, const struct sde_format *fmt, u32 flags, const struct sde_format *fmt, bool blend_enabled, u32 flags, enum sde_sspp_multirect_index index); /** Loading
drivers/gpu/drm/msm/sde/sde_plane.c +11 −2 Original line number Diff line number Diff line Loading @@ -1451,6 +1451,7 @@ static int _sde_plane_color_fill(struct sde_plane *psde, const struct sde_format *fmt; const struct drm_plane *plane; struct sde_plane_state *pstate; bool blend_enable = true; if (!psde || !psde->base.state) { SDE_ERROR("invalid plane\n"); Loading @@ -1473,6 +1474,9 @@ static int _sde_plane_color_fill(struct sde_plane *psde, */ fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888); blend_enable = (SDE_DRM_BLEND_OP_OPAQUE != sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)); /* update sspp */ if (fmt && psde->pipe_hw->ops.setup_solidfill) { psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw, Loading @@ -1488,7 +1492,7 @@ static int _sde_plane_color_fill(struct sde_plane *psde, if (psde->pipe_hw->ops.setup_format) psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, SDE_SSPP_SOLID_FILL, fmt, blend_enable, SDE_SSPP_SOLID_FILL, pstate->multirect_index); if (psde->pipe_hw->ops.setup_rects) Loading Loading @@ -3527,6 +3531,7 @@ static int sde_plane_sspp_atomic_update(struct drm_plane *plane, struct sde_rect src, dst; const struct sde_rect *crtc_roi; bool q16_data = true; bool blend_enabled = true; int idx; if (!plane) { Loading Loading @@ -3761,8 +3766,12 @@ static int sde_plane_sspp_atomic_update(struct drm_plane *plane, if (rstate->out_rotation & DRM_REFLECT_Y) src_flags |= SDE_SSPP_FLIP_UD; blend_enabled = (SDE_DRM_BLEND_OP_OPAQUE != sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)); /* update format */ psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, src_flags, psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, blend_enabled, src_flags, pstate->multirect_index); if (psde->pipe_hw->ops.setup_cdp) { Loading