Commit ae573723 authored Mar 14, 2018 by Mulu He

ARM: dts: coresight: Bypass SMMU for ETR



Add S1 bypass Workaround for ETR SMMU HW issue.

Change-Id: I0b9034659ffbd546d16c9634b826bc91a2aa9832
Signed-off-by: Mulu He <muluhe@codeaurora.org>

parent 3aa95eca

arch/arm64/boot/dts/qcom/sdm855-coresight.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -313,6 +313,7 @@
		<0x6064000 0x15000>;
		reg-names = "tmc-base", "bam-base";

		qcom,smmu-s1-bypass;
		iommus = <&apps_smmu 0x05e0 0>;
		arm,buffer-size = <0x400000>;