Commit ae054cee authored Jan 08, 2018 by Mulu He Committed by Gerrit - the friendly Code Review server Mar 30, 2018

ARM: dts: coresight: Add master side control for STM



Add register in STM to read debug status register, STM uses this register
to decide whether log can be enabled from master side.

Change-Id: I546eba814de14d0d90b5bf8aa1e2b8464440d603
Signed-off-by: Mulu He <muluhe@codeaurora.org>

parent 5e993927

arch/arm64/boot/dts/qcom/sdm855-coresight.dtsi

+3 −2

Original line number	Diff line number	Diff line
		@@ -432,8 +432,9 @@
		arm,primecell-periphid = <0x0003b962>;

		reg = <0x6002000 0x1000>,
		<0x16280000 0x180000>;
		reg-names = "stm-base", "stm-stimulus-base";
		<0x16280000 0x180000>,
		<0x7820f0 0x4>;
		reg-names = "stm-base", "stm-stimulus-base", "stm-debug-status";

		coresight-name = "coresight-stm";