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Commit ad8ec648 authored by Mulu He's avatar Mulu He Committed by muluhe
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ARM: dts: msm: Add NPU TPDM node for sm8150 



Add NPU TPDM node for sm8150, TPDM is used to config HW event for NPU.

Change-Id: I14f93c2d9d9d68923e356da0ae8a2c9417e5bbd4
Signed-off-by: default avatarMulu He <muluhe@codeaurora.org>
parent ad957023

arch/arm64/boot/dts/qcom/sm8150-coresight.dtsi

+33 −9
Original line number Diff line number Diff line
@@ -1730,14 +1730,38 @@ 


		coresight-name = "coresight-tpdm-npu";



		clocks = <&clock_npucc NPU_CC_NPU_CORE_APB_CLK>,

		clocks = <&clock_aop QDSS_CLK>,

			<&clock_gcc GCC_NPU_TRIG_CLK>,

			<&clock_gcc GCC_NPU_AT_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_APB_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_ATB_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_CLK_SRC>,

			<&clock_npucc NPU_CC_NPU_CORE_CTI_CLK>;



		com,tpdm-clks = "npu_cc_npu_core_apb_clk",

				"npu_cc_npu_core_atb_clk",

				"npu_cc_npu_core_cti_clk";

		com,tpdm-regs  = <&npu_core_gdsc>;

		clock-names = "apb_pclk",

			"gcc_npu_trig_clk",

			"gcc_npu_at_clk",

			"npu_core_apb_clk",

			"npu_core_atb_clk",

			"npu_core_clk",

			"npu_core_clk_src",

			"npu_core_cti_clk";



		qcom,tpdm-clks = "apb_pclk",

			"gcc_npu_trig_clk",

			"gcc_npu_at_clk",

			"npu_core_apb_clk",

			"npu_core_atb_clk",

			"npu_core_clk",

			"npu_core_clk_src",

			"npu_core_cti_clk";



		vdd-supply = <&npu_core_gdsc>;

		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names ="vdd", "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		qcom,tpdm-regs  = "vdd", "vdd_cx";



		port{

			tpdm_npu_out_tpda: endpoint {